Tapas Dutta

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I am a post-doctoral research associate with the Device Modeling Group, University of Glasgow. Earlier I was a post-doc at Nanolab, Department of Electrical Engineering, IIT Kanpur. I received the Bachelor of Technology degree with distinction from Vellore Institute of Technology, Vellore and the Master of Technology degree from Indian Institute of Technology Roorkee, both in Electronics and Communication Engineering. I obtained the PhD degree in Nanoelectronics and Nanotechnology from Institut National Polytechnique de Grenoble (INPG), Grenoble, France in 2014. My doctoral research was concerned with the modeling and simulation of alternative channel material MOSFETs.