Stanislav Markov

Welcome


Stanislav Markov is a post-doctoral research associate in the School of EngineeringUniversity of Glasgow. Working in the Device Modelling Group lead by Prof. Asen Asenov, Stanislav is pursuing his interests in modelling and simulation of nano-scale electron devices.
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Stanislav's research focus is in the field of emerging electronic devices, for which the synergy of different modelling approaches is necessary to reach not only a good undesrtanding of operational principles, but also to realise a successful device design and optimisation. An example is our effort to design an electronic device based on the redox properties of inorganic polyoxometalate molecular clusters – modelling in this case requires a bridge between the density functional theory and device modelling approches. Stanislav actively investigates in the field of statistical variability and reliability of ultra-scaled devices too (e.g. fluctuations in threshold voltage, drain current and gate leakage in fully depleted silicon-on-insulator MOSFETs scaled-down beyond 30nm). The aim is to gain further understanding of the phenomena that lead to a large, time-dependent spread of device characteristics, and to help the variability- and reliability-aware design of future generations of microchip technology.

Dr. Markov obtained a Ph.D. degree in electrical engineering from the University of Galsgow UK, in 2009. Before joining the Device Modelling Group in 2005, Stanislav held a Senior Design Engineer post with Cadence (Livingston, UK, 2000-2004). He has acquired more than 7 years of industrial experience, becoming an expert in digital VLSI systems design and verification. He received an M.Sc. degree in electronics engineering from the Technical University of Sofia, Bulgaria in 1997.


Contact

E-mail: Stanislav.Markov@glasgow.ac.uk
Phone: +44 (0) 141 330 4792
Fax: +44 (0) 141 330 4907
Address: School of Engineering, Rankine Bldg.
University of Glasgow, Glasgow, G12 8LT
United Kingdom

A kind of excellence

Stanislav received the Alan Stirling Brown prize for outstanding post-graduate research, upon his graduation (2 July 2009) with a PhD degree from the Faculty of Engineering, University of Glasgow, UK.

Stanislav is the winner of the prestigious 38-th IEEE SISC Ed Nicollian Award for best student paper
S. Markov, S. Roy, C. Fiegna, E. Sangiorgi, and A. Asenov - "Band-gap and permittivity change at high-k gate stack interfaces - device perspective" - 38-th IEEE Semiconductor Interface Specialists Conference, December 6-8, 2007, Arlington (VA), USA


Scholarships

Stanislav's PhD research was mostly funded through an Engineering and Physical Sciences Research Council (EPSRC) Fellowship, and was supervised by Prof. Asen Asenov.

In 2007, Stanislav accepted a Marie Curie Fellowship for Early Stage Research Training from the European Commission, for a six-month work in the The Advanced Research Center on Electronic Systems for Information and Communication Technologies E. De Castro (ARCES), at the University of Bologna, Italy. In the scope of this fellowship, Stanislav worked on tunnelling current through alternative dielectric gate stacks, under the supervision of Prof. Claudio Fiegna, in the group lead by Prof. Enrico Sangiorgi.


Select Publications

S. Markov, B. Cheng and A. Asenov, "Statistical Variability in Fully Depleted SOI MOSFETs Due to Random Dopant Fluctuations in the Source and Drain Extensions," IEEE Electron Device Letters, Vol. 33, No. 3, pp. 315–317, Mar. 2012.

S. Markov, X. Wang, N. Moezi and A. Asenov, "Drain Current Collapse in Nano-Scaled Bulk MOSFETs Due to Random Dopant Compensation in the Source/Drain Extensions," IEEE Transactions on Electron Devices,, Vol. 58, No. 8, pp. 2385–2393, Aug. 2011.

X. Wang, A. R. Brown, N. M. Idris, S. Markov, G. Roy and A. Asenov, "Statistical Threshold-Voltage Variability in Scaled Decananometer Bulk HKMG MOSFETs: A Full-Scale 3-D Simulation Scaling Study," IEEE Transactions on Electron Devices, Vol. 58, No. 8, pp. 2293–2301, Aug. 2011.

S. Markov, S. Roy and A. Asenov, "Direct Tunnelling Gate Leakage Variability in Nano-CMOS Transistors," IEEE Transactions on Electron Devices, Vol. 57, No. 11, pp. 3106–3114, Nov. 2010.

S. Markov, P. V. Sushko, C. Fiegna, E. Sangiorgi, A. Shluger and A. Asenov, "From ab initio properties of the Si-SiO2 interface, to electrical characteristics of metal-oxide-semiconductor devices," Journal of Physics: Conference Series, Vol. 242, No. 1, p. 012010, Jan. 2010.

S. Markov, P. V. Sushko, S. Roy, C. Fiegna, E. Sangiorgi, A. L. Shluger, and A. Asenov, "Si-SiO2 interface band-gap transition - effects on MOS inversion layer," Physica Status Solidi (A) 205, 1290 (2008)

S. Markov, "Gate leakage variability in nano-CMOS transistors", PhD Thesis, University of Glasgow (2009)


Area of work

Molecular electronics research on the use of polyoxometalates for non-volatile memory storage

Statistical Variability in silicon-on-insulator (SOI) transistors with ultra thin body and box (UTBB)

Statistical Reliability of ultra-scaled CMOS transistors


Recent grants worked on

 

  • Mordred (Modelling of the reliability and degradation of next generation nanoelectronic devices), EU-FP7, University of Glasgow (May 2011 – Present)

Collaboration between six academic and two industrial European research institutions, Advancing the Glasgow 3D device simulator towards time-dependent simulation of oxide degradation and break-down in contemporary and future CMOS devices under the influence of statistical variability.

 

  • M-MOS, (EPSRC Molecular-Metal-Oxide-Semiconductor Nanoelectronics), Inter-departmental (Chemistry, Physics, Engineering) collaboration, University of Glasgow (Nov. 2010 – Present) 

Responsible for the device modelling and simulation of a memory-cell working on the principle of chemical gating; Substantially advancing the modelling field by interfacing the device simulator to DFT calculations of the electron density distribution in a molecule. 

 

  • Trams (EU-FP7 Terascale Reliable Adaptive Memory Systems), Collaboration between leading European academic institutions and Intel Corp.: D1.1: PDK for sub 16 nm technology bulk MOSFETs including statistical variability and statistical reliability, University of Glasgow (May – Dec, 2010)

Studied the amount of threshold voltage fluctuations in 18nm bulk MOSFETs at different levels of dielectric degradation and various sources of statistical variability



Publications (Full List)

2013

  • F. Adamu-Lema, C. M. C. M. Compagnoni, S. M. Amoroso, N. Castellani, S. Markov, L. Gerrer, A. S. A. S. Spinelli, A. L. A. L. Lacaita and A. Asenov, "Accuracy and issues of the spectroscopic analysis of RTN traps in nanoscale MOSFETs," IEEE Trans. Electron Devices, Vol. 60, No. 2, pp. 833–839, Feb. 2013.
  • S. M. Amoroso, L. Gerrer, S. Markov, F. Adamu-Lema and A. Asenov, "RTN and BTI in Nanoscale MOSFETs: A Comprehensive Statistical Simulation Study," Solid State Electronics, Mar. 2013.

2012

  • F. Adamu-Lema, S. M. Amoroso, S. Markov, L. Gerrer and A. Asenov, "A Unified Computational Scheme for 3D Statistical Simulation of Reliability Degradation of Nanoscale MOSFETs," 17th International Conference on Simulation of Semiconductor Processes and Devices (SISPAD): Sept. 5-7, 2012.
  • S. M. Amoroso, L. Gerrer, S. Markov, F. Adamu-Lema and A. Asenov, "Comprehensive Statistical Comparison of RTN and BTI in Deeply Scaled MOSFETs by means of 3D ‘Atomistic’ Simulation," 42nd European Solid-State Device Research Conference (ESSDERC): Sept. 17-21, 2012.
  • S. M. Amoroso, F. Adamu-Lema, S. Markov, L. Gerrer and A. Asenov, "3D Dynamic RTN Simulation of a 25nm MOSFET: The Importance of Variability in Reliability Evaluation of Decananometer Devices," 15th International Workshop on Computational Electronics (IWCE): 2012.
  • L. Gerrer, S. Markov, S. M. Amoroso, F. Adamu-Lema and A. Asenov, "Impact of random dopant fluctuations on trap-assisted tunnelling in nanoscale MOSFETs," Journal of Microelectronics Reliability, July 2012.
  • S. Markov, B. Cheng and A. Asenov, "Statistical Variability in Fully Depleted SOI MOSFETs Due to Random Dopant Fluctuations in the Source and Drain Extensions," IEEE Electron Device Letters, Vol. 3, No. 3, pp. 315–317, 2012.
  • S. Markov, L. Gerrer, S. M. Amoroso, F. Adamu-Lema and A. Asenov, "Time Domain Simulation of Statistical Variability and Oxide Degradation Including Trapping/detrapping Dynamics," 17th International Conference on Simulation of Semiconductor Processes and Devices (SISPAD): Sept. 5-7, 2012.
  • A. S. Mohd Zain, S. Markov, B. Cheng, X. Wang and A. Asenov, "Comprehensive Study of the Statistical Variability in a 22nm Fully-Depleted Ultra-Thin-Body SOI MOSFET," EuroSOI 2012 Conference: Jan. 23-25, 2012.

2011

  • N. Aymerich, A. Asenov, A. R. Brown, R. Canal, B. Cheng, J. Figueras, A. Gonzalez, E. Herrero, S. Markov, M. Miranda, P. Pouyan, T. Ramirez, A. Rubio, I. Vatajelu, X. Vera, X. Wang and P. Zuber, "New Reliability Mechanisms in Memory Design for sub-22nm Technologies," in Proc. IEEE 17th International On-Line Testing Symposium, Athens, Greece, July 13-15, 2011, pp. 111–114.
  • N. M. Idris, B. Cheng, A. R. Brown, S. Markov and A. Asenov, "Comprehensive Simulation Study of Statistical Variability in 32nm SOI MOSFET," in Proc. 7th Workshop of the Thematic Network on Silicon on Insulator technology, devices and circuits, Jan. 17-19, 2011,
  • S. Markov, X. Wang, N. Moezi and A. Asenov, "Drain Current Collapse in Nanoscaled Bulk MOSFETs Due to Random Dopant Compensation in the Source/Drain Extensions," Electron Devices, IEEE Transactions on, Vol. 58, No. 8, pp. 2385–2393, Aug. 2011.
  • S. Markov, N. M. Idris and A. Asenov, "Statistical variability in n-channel UTB-FD-SOI MOSFETs under the influence of RDF, LER, MGG and PBTI," in Proc. SOI Conference (SOI), 2011 IEEE International, Oct. 3-6, 2011,
  • X. Wang, S. Markov and A. Asenov, "Channel-length dependence of statistical threshold-voltage variability in extremely scaled HKMG MOSFETs," in Proc. 12th Ultimate Integration on Silicon, Cork, Ireland, Mar. 14-16, 2011, pp. 175–178.
  • X. Wang, A. R. Brown, N. M. Idris, S. Markov, G. Roy and A. Asenov, "Statistical Threshold-Voltage Variability in Scaled Decananometer Bulk HKMG MOSFETs: A Full-Scale 3-D Simulation Scaling Study," IEEE Transactions on Electron Devices, Vol. 58, No. 8, pp. 2293–2301, Aug. 2011.

2010

  • A. R. Brown, X. Wang, S. Markov, B. Cheng and A. Asenov, "Simulation of statistical variability in 18 and 13nm bulk MOSFETs," Intel European Research and Innovation Conference: Oct. 12-14, 2010.
  • S. Markov, S. Roy and A. Asenov, "Direct Tunnelling Gate Leakage Variability in Nano-CMOS Transistors," Electron Devices, IEEE Transactions on, Vol. 57, No. 11, pp. 3106–3114, Nov. 2010.
  • S. Markov, P. V. Sushko, C. Fiegna, E. Sangiorgi, A. Shluger and A. Asenov, "From ab initio properties of the Si-SiO2 interface, to electrical characteristics of metal-oxide-semiconductor devices," Journal of Physics: Conference Series, Vol. 242, No. 1, p. 012010, Jan. 2010.

2008

  • S. Markov, S. Roy, C. Fiegna, E. Sangiorgi and A. Asenov, "On the sub-nm EOT scaling of high-K gate stacks," Ultimate Limits of Integration in Silicon 2008: Mar. 12-14, 2008.
  • S. Markov, P. V. Sushko, S. Roy, C. Fiegna, E. Sangiorgi, A. L. Shluger and A. Asenov, "Si-SiO2 interface band-gap transition - effects on MOS inversion layer," Physica Status Solidi (a), Vol. 205, No. 6, pp. 1290–1295, 2008.

2007

  • S. Markov, A. R. Brown, B. Cheng, G. Roy, S. Roy and A. Asenov, "Three-dimensional statistical simulation of gate leakage fluctuations due to combined interface roughness and random dopants," Japanese Journal of Applied Physics Part 1-Regular Papers Brief Communications & Review Papers, Vol. 46, No. 4B, pp. 2112–2116, 2007.
  • S. Markov, N. Barin, C. Fiegna, S. Roy, E. Sangiorgi and A. Asenov, "Analysis of silicon dioxide transitional region in MOS structures," in Proc. Simulation of Semiconductor Processes and Devices, T. Graser and S. Selberherr, Eds., Vienna, Austria, Sept. 2007, pp. 149–152.
  • S. Markov, S. Roy, C. Fiegna, E. Sangiorgi and A. Asenov, "Band-gap and permittivity change at high-k gate stack interfaces - device perspective," 38th IEEE Semiconductor Interface Specialists Conference: 2007.

2006

  • S. Markov, A. R. Brown, B. Cheng, G. Roy, S. Roy and A. Asenov, "3D statistical simulation of gate leakage fluctutations due to combined interface roughness and random dopants," in Proc. Solid-State Devices and Materials (SSDM), Yokohama, Japan, Sept. 12-15, 2006, pp. 362–363.