Biography

Scott obtained a B.Sc. in Physics and Electronic Engineering in 1987 from what was then the Department of Natural Philosophy at the University of Glasgow.  He completed Ph.D. studies in 1994, investigating "Engineering aspects of extended single electronic systems" in the Department of Electronics and Electrical Engineering under the supervision of Prof. John Barker.

In the late 90's, he was a Research Assistant with Prof. John Barker and Prof. Asen Asenov on a number of projects, including design and construction of DC-Hypermesh parallel processing machine, Monte Carlo simulation of Si:SiGe HMOS devices and InGaAs HEMTs for VLSI and RF applications, and the development of training programmes in semiconductor device physics using commercial simulators.

He is presently a Reader in the Department of Electronics and Electrical Engineering at the University of Glasgow, and a member of the Device Modelling and Microelectronics Systems Groups.  He has published over 100 papers in the fields of device transport, Monte Carlo simulation, device scaling, bio-nanotechnology, and the development of practical compact models and circuit simulation techniques for nanoscale devices subject to variability.  He serves on the programme committee of ULIS, and has been investigator or co-investigator on grants from SEMATECH, the EU, Fujitsu, and 11 EPSRC grants, 6 of which are currently active.

Further information: http://www.gla.ac.uk/schools/engineering/staff/scottroy/

Publications

2014

  • X. Wang, A. R. Brown, B. Cheng, S. Roy and A. Asenov, "Drain Bias Effects on Statistical Variability and Reliability and Related Subthreshold Variability in 20-nm Bulk Planar MOSFETs," Solid-State Electronics, Vol. 98, pp. 99–105, Aug. 2014.

2011

  • H. Feng, B. Cheng, S. Roy and D. R. S. Cumming, Eds., An analytical mismatch model of nanoCMOS device under impact of intrinsic device variability, 2011, 2011.
  • A. Martinez, A. R. Brown, S. Roy and A. Asenov, "NEGF simulations of a junctionless Si gate-all-around nanowire transistor with discrete dopants," in Proc. Ultimate Integration on Silicon, Cork, Ireland, Mar. 14-16, 2011,
  • M. Merrett, P. Asenov, Y. Wang, M. Zwolinski, S. Roy, C. Millar and D. Reid, "Modelling Circuit Performance Variations due to Statistical Variability: Monte Carlo Static Timing Analysis," Design, Automation and Test in Europe: Mar. 14-18, 2011.
  • C. Riddet, C. L. Alexander, A. R. Brown, S. Roy and A. Asenov, "Simulation of "Ab Initio" Quantum Confinement Scattering in UTB MOSFETs Using Three-Dimensional Ensemble Monte Carlo," IEEE Transactions on Electron Devices, Vol. 58, No. 3, pp. 600–608, Mar. 2011.
  • X. Wang, S. Roy, A. R. Brown and A. Asenov, "Impact of STI on Statistical Variability and Reliability of Decananometer MOSFETs," IEEE Electron Device Letters, Vol. 32, No. 4, pp. 479–481, Apr. 2011.

2010

  • A. Asenov, B. Cheng, D. Dideban, U. Kovac, N. Moezi, C. Millar, G. Roy, A. R. Brown and S. Roy, "Modeling and Simulation of Transistor and Circuit Variability and Reliability," Custom Integrated Circuit Conference: San Jose, California, Sept. 19-22, 2010.
  • P. Asenov, N. A. Kamsani, D. Reid, C. Millar, S. Roy and A. Asenov, "Combining Process and Statistical Variability in the Evaluation of the Effectiveness of Corners in Digital Circuit Parametric Yield Analysis," European Solid-State Circuits Conference: Sept. 13-17, 2010.
  • P. Asenov, D. Reid, C. Millar, S. Roy, Z. Liu, S. Furber and A. Asenov, "Generic Aspects of Digital Circuit Behaviour in the Presence of Statistical Variability," European Workshop on CMOS Variability: May 26, 2010.
  • T. Azam, B. Cheng, S. Roy and D. R. S. Cumming, "Robust asymmetric 6T-SRAM cell for low-power operation in nano-CMOS technologies," Electronics Letters, Vol. 46, pp. 273–274, 2010.
  • B. Bindu, B. Cheng, G. Roy, X. Wang, S. Roy and A. Asenov, "Parameter set and data sampling strategy for accurate yet efficient statistical MOSFET compact model extraction," Solid-State Electronics, Vol. 54, No. 3, pp. 307–315, Mar. 2010.
  • M. Faiz. Bukhori, S. Roy and A. Asenov, "Simulation of Statistical Aspects of Charge Trapping and Related Degradation in Bulk MOSFETs in the Presence of Random Discrete Dopants," IEEE Trans. Electron Dev. Vol. 57, No. 4, pp. 795–803, Apr. 2010.
  • B. Cheng, D. Dideban, N. Moezi, C. Millar, G. Roy, X. Wang, S. Roy and A. Asenov, "Statistical Variability Compact Modeling Strategies for BSIM4 and PSP," IEEE Design and Test of Computers, Vol. 27, No. 2, pp. 26–35, Mar./Apr. 2010.
  • B. Cheng, D. Dideban, N. Moezi, C. Millar, G. Roy, X. Wang, S. Roy and A. Asenov, "Capturing Intrinsic Parameter Fluctuations using the PSP Compact Model," in Proc. Design, Automation and Test in Europe, Dresden, Germany, Mar. 8-12, 2010, pp. 650–653.
  • B. Cheng, N. Moezi, D. Dideban, C. Millar, S. Roy and A. Asenov, "Impact of Statistical Parameter Set Selection on Accuracy of Statistical Compact Modeling," MOS-AK Workshop: Sapienza Università di Roma, Apr. 8-9, 2010.
  • B. Cheng, A. R. Brown, S. Roy and A. Asenov, "PBTI/NBTI-Related Variability in TB-SOI and DG MOSFETs," IEEE Electron Device Letters, Vol. 31, No. 5, pp. 408–410, May 2010.
  • D. Dideban, B. Cheng, N. Moezi, N. A. Kamsani, C. Millar, S. Roy and A. Asenov, "Impact of Input Slew Rate on Statistical Timing and Power Dissipation Variability in nano CMOS," in Proc. Ultimate Integration on Silicon, Glasgow, Scotland, UK, Mar. 17-19, 2010, pp. 45–48.
  • N. A. Kamsani, B. Cheng, C. Millar, N. Moezi, X. Wang, S. Roy and A. Asenov, "Impact of Slew Rate Definition on the Accuracy of nanoCMOS Inverter Timing Simulations," in Proc. Ultimate Integration on Silicon, Glasgow, Scotland, UK, Mar. 17-19, 2010,
  • S. Markov, S. Roy and A. Asenov, "Direct Tunnelling Gate Leakage Variability in Nano-CMOS Transistors," Electron Devices, IEEE Transactions on, Vol. 57, No. 11, pp. 3106–3114, Nov. 2010.
  • I. Moore, C. Millar, S. Roy and A. Asenov, Eds., Integrating drift-diffusion and Brownian simulations for sensory applications, 2010, Ultimate Integration on Silicon, Mar. 17-19, 2010.
  • D. Reid, C. Millar, S. Roy and A. Asenov, "Understanding LER-Induced MOSFET VT Variability—Part I: Three-Dimensional Simulation of Large Statistical Samples," IEEE Transactions on Electron Devices, Nov. 2010.
  • D. Reid, C. Millar, S. Roy and A. Asenov, "Understanding LER-Induced MOSFET VT Variability—Part II: Reconstructing the Distribution," IEEE Transactions on Electron Devices, Nov. 2010.
  • R. O. Sinnott, G. Stewart, A. Asenov, C. Millar, D. Reid, G. Roy, S. Roy, C. Davenhall, B. Harbulot and M. Jones, "E-Infrastructure Support for nanoCMOS Device and Circuit Simulations," Parallel and Distributed Computing and Networks: Feb. 16-18, 2010.

2009

  • A. Asenov, A. R. Brown, G. Roy, B. Cheng, C. L. Alexander, C. Riddet, U. Kovac, A. Martinez, N. Seoane and S. Roy, "Simulation of statistical variability in nano-CMOS transistors using drift-diffusion, Monte Carlo and non-equilibrium Green’s function techniques," Journal of Computational Electronics, Vol. 8, No. 3-4, pp. 349–373, 2009.
  • M. Faiz. Bukhori, A. R. Brown, S. Roy and A. Asenov, "Simulation of statistical aspects of reliability in nano CMOS transistors," in Proc. International Integrated Reliability Workshop, ser. 2009 IIRW Final Report, California, Oct. 18-22, 2009, pp. 82–85.
  • B. Cheng, N. Moezi, D. Dideban, G. Roy, S. Roy and A. Asenov, "Benchmarking the Accuracy of PCA Generated Statistical Compact Model Parameters Against Physical Device Simulation and Directly Extracted Statistical Parameters," in Proc. Simulation of Semiconductor Processes and Devices, Sept. 9-11, 2009, pp. 143–146.
  • B. Cheng, S. Roy, A. R. Brown, C. Millar and A. Asenov, "Evaluation of statistical variability in 32 and 22 nm technology generation LSTP MOSFETs," Solid-State Electronics, Vol. 53, No. 7, pp. 767–772, July 2009.
  • D. Graham, Bradley, S. Roy and F. Rodriguez-Salazar, "A low-tech solution to avoid the severe impact of transient errors on the IP interconnect," in Proc. The 39th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, Estoril, Portugal, June 29-July 2, 2009,
  • N. A. Kamsani, B. Cheng, S. Roy and A. Asenov, "Impact of Random Dopant Induced Statistical Variability on Inverter Switching Trajectories and Timing Variability," in Proc. IEEE International Symposium on Circuits and Systems, Taipei, Taiwan, May 24-27, 2009,
  • D. Reid, C. Millar, G. Roy, S. Roy and A. Asenov, "Analysis of Threshold Voltage Distribution due to Random Dopants: A 100,000 Sample 3D Simulation Study," IEEE Transactions on Electron Devices, Oct. 2009.
  • D. Reid, C. Millar, G. Roy, S. Roy and A. Asenov, "Understanding LER-induced Statistical Variability: A 35,000 Sample 3D Simulation Study," Proc. ESSDERC 2009: Sept. 14-18, 2009.
  • D. Reid, C. Millar, G. Roy, S. Roy and A. Asenov, "Efficient Simulations of 6σ VT Distributions Due to Random Discrete Dopants," Proc. ULIS 2009: Mar. 2009.
  • D. Reid, C. Millar, G. Roy, S. Roy and A. Asenov, "Statistical enhancement of combined simulations of RDD and LER variability: What can simulation of a 10^5 sample teach us?" International Electron Devices Meeting 2009: Dec. 7-9, 2009.
  • D. Reid, R. O. Sinnott, C. Millar, G. Roy, S. Roy and G. Stewart, "Enabling Cutting-edge Semiconductor Simulation through Grid Technology," Journal of the Philosophical Transactions of the Royal Society A, January 2009. Jan. 2009.
  • X. Wang, S. Roy and A. Asenov, "Impact of Strain on the Performance of high-k/metal replacement gate MOSFETs," in Proc. 10th ULIS, Aachen Germany, Mar. 18-20, 2009, pp. 289–292.

2008

  • A. Asenov, S. Roy, A. R. Brown, G. Roy, C. L. Alexander, C. Riddet, C. Millar, B. Cheng, A. Martinez, N. Seoane, D. Reid, M. Faiz. Bukhori, X. Wang and U. Kovac, "Advanced simulation of statistical variability and reliability in nano CMOS transistors," in Proc. IEDM, USA, Dec. 2008, p. 421.
  • B. Bindu, B. Cheng, G. Roy, X. Wang, S. Roy and A. Asenov, "An efficient data sampling strategy for statistical parameter extraction of nano-MOSFETs," IEEE Workshop on Compact Modeling: Sept. 8-8, 2008.
  • M. Faiz. Bukhori, S. Roy and A. Asenov, "Statistical Simulation of RTS Amplitude Distribution in Realistic Bulk MOSFETs Subject to Random Discreet Dopants," Ultimate Limits of Integration in Silicon 2008: Mar. 12-14, 2008.
  • M. Faiz. Bukhori, S. Roy and A. Asenov, "Statistical Aspects of Reliability in Bulk MOSFETs with Multiple Defect States and Random Discrete Dopants," Microelectronics Reliability, Vol. 48, No. 8-9, pp. 1549–1552, Aug. 2008.
  • B. Cheng, S. Roy and A. Asenov, "Simulation of intrinsic parameter fluctuations in CMOS: the link between physical device and circuit," Design Automation and Test in Europe: Workshop W2, Impact of Process Variability on Design and Test: Mar. 10-14, 2008.
  • B. Cheng, S. Roy, A. R. Brown, C. Millar and A. Asenov, "Evaluation of intrinsic parameter fluctuations in 45, 32 and 22 nm technology node LP n-MOSFETs," Proc. ESSDERC 2008: Sept. 15-19, 2008.
  • B. Cheng, S. Roy, A. R. Brown, C. Millar and A. Asenov, "Statistical Variations in 32nm Thin-Body SOI Devices and SRAM Cells," Proc. ICSICT 2008: 2008.
  • D. Graham, D. Bradley, S. Roy, P. Strid and F. Rodriguez-Salazar, "Design for Reliability: An Analysis of Logical Masking on Transient Faults," in Proc. 2008 IEEE workshop on silicon errors in logic, Austin, TX, Mar. 26-27, 2008,
  • N. H. Hamid, A. F. Murray and S. Roy, "Time-domain modelling of low-frequency noise in deep-submicrometer MOSFET," IEEE Transactions on Circuits and Systems-I: Regular Papers, Vol. 55, No. 1, pp. 233–245, Feb. 2008.
  • N. A. Kamsani, B. Cheng, S. Roy and A. Asenov, "Statistical Circuit Simulation with the Effect of Random Discrete Dopants in Nanometer MOSFET Devices," Design Automation and Test in Europe: Workshop W2, Impact of Process Variability on Design and Test: Munich, Germany, Mar. 10-14, 2008.
  • N. A. Kamsani, B. Cheng, S. Roy and A. Asenov, "Statistical Circuit Simulation with Supply-Voltage Scaling In Nanometre MOSFET Devices Under The Influence of Random Dopant Fluctuations," in Proc. 7th edition of Faible Tension Faible Consommation, Leuven, Belgium, May 26-28, 2008,
  • U. Kovac, D. Reid, C. Millar, G. Roy, S. Roy and A. Asenov, "Statistical simulation of random dopant induced threshold voltage fluctuations for 35 nm channel length MOSFET," Microelectronics Reliability, Vol. 48, No. 8-9, pp. 1572–1575, 2008.
  • S. Markov, S. Roy, C. Fiegna, E. Sangiorgi and A. Asenov, "On the sub-nm EOT scaling of high-K gate stacks," Ultimate Limits of Integration in Silicon 2008: Mar. 12-14, 2008.
  • S. Markov, P. V. Sushko, S. Roy, C. Fiegna, E. Sangiorgi, A. L. Shluger and A. Asenov, "Si-SiO2 interface band-gap transition - effects on MOS inversion layer," Physica Status Solidi (a), Vol. 205, No. 6, pp. 1290–1295, 2008.
  • C. Millar, R. Madathil, O. Beckstein, M. S. P. Sansom, S. Roy and A. Asenov, "Brownian simulation of charge transport in α-Haemolysin," Journal of Computational Electronics, 2008.
  • C. Millar, S. Roy, D. Cumming, T. Drysdale, S. Furber, D. Edwards, M. Zwolinski, A. Tyrrell, A. Murray, S. Pickles, R. O. Sinnott, D. Berry and A. Asenov, "Meeting the Design Challenges of Nano-CMOS Electronics," in Proc. Workshop on the Impact of Process Variability on Design and Test, Mar. 2008,
  • C. Millar, S. Roy, D. R. S. Cumming, T. D. Drysdale, S. Furber, D. Edwards, M. Zwolinski, A. M. Tyrrell, A. F. Murray, S. Pickles, R. O. Sinnott, D. Berry and A. Asenov, "Meeting the Design Challenges of nano-CMOS Electronics," Design Automation and Test in Europe: Workshop W2, Impact of Process Variability on Design and Test: Mar. 10-14, 2008.
  • C. Millar, D. Reid, G. Roy, S. Roy and A. Asenov, "Accurate Statistical Description of Random Dopant Induced Threshold Voltage Variability," IEEE Electron Device Letters, Vol. 29, No. 8, pp. 946–948, Aug. 2008.
  • S. H. Paluchowski, B. Cheng, S. Roy, A. Asenov and D. R. S. Cumming, "Investigation into effects of device variability on CMOS layout motifs," Electronics Letters, Vol. 44, No. 10, pp. 626–627, May 2008.
  • D. Reid, C. Millar, S. Roy, G. Roy, R. O. Sinnott, G. Stewart, G. Stewart and A. Asenov, "An Accurate Statistical Analysis of Random Dopant Induced Variability in 140,000 13nm MOSFETs," Silicon Nanoelectronics Workshop 2008: June 15-16, 2008.
  • D. Reid, C. Millar, S. Roy, R. O. Sinnott, G. Stewart, G. Stewart and A. Asenov, "Prediction of Random Dopant Induced Threshold Voltage Fluctuations in NanoCMOS Transistors," Simulation of Semiconductor Processes and Devices 2008: Sept. 9-11, 2008.
  • D. Reid, S. Roy, C. Millar, G. Roy, R. O. Sinnott, G. Stewart and A. Asenov, "Supporting Statistical Semiconductor Analysis using EGEE and OMII-UK Middleware," EGEE 3rd User Forum: Feb. 2008.
  • D. Reid, C. Millar, A. Asenov, S. Roy, G. Roy, R. O. Sinnott and G. Stewart, "Supporting Statistical Semiconductor Device Analysis using EGEE and OMII-UK Middleware," EGEE User Conference: Clermont-Ferrand, France, Feb. 2008.
  • D. Reid, C. Millar, S. Roy, G. Roy, R. O. Sinnott, G. Stewart, G. Stewart and A. Asenov, "Enabling Cutting-Edge Semiconductor Simulation through Grid Technology," All Hands Meeting 2008: Sept. 2008.
  • C. Riddet, A. R. Brown, S. Roy and A. Asenov, "Boundary Conditions for Density Gradient Corrections in 3D Monte Carlo Simulations," Journal of Computational Electronics, Vol. 7, No. 3, pp. 231–235, 2008.
  • S. Roy, C. Millar and A. Asenov, "Impact of Device Variability on Design," Ultimate Limits of Integration in Silicon 2008: Mar. 12-14, 2008.
  • S. Roy, C. Millar and A. Asenov, "Statistical Compact Modelling as a Tool in Understanding Circuit Variability," Design Automation and Test in Europe: Workshop W2, Impact of Process Variability on Design and Test: Mar. 10-14, 2008.
  • S. Roy, B. Cheng and A. Asenov, "Impact of Intrinsic Parameter Fluctuations in Nano-CMOS Devices on Circuits and Systems," in PHYSICS AND MODELING OF TERA- AND NANO-DEVICES, ser. Selected Topics in Electronics and Systems, M. Ryzhii and V. Ryzhii, Eds. New York, USA: World Scientific, 2008,
  • R. O. Sinnott, A. Asenov, C. Bayliss, C. Davenhall, T. Doherty, B. Harbulot, M. Jones, D. Martin, C. Millar, G. Roy, S. Roy, G. Stewart and J. Watt, "Integrating Security Solutions to Support nanoCMOS Electronics Research," IEEE International Symposium on Parallel and Distributed Processing Systems with Applications: Sydney, Australia, Dec. 2008.
  • R. O. Sinnott, A. Asenov, C. Millar, D. Berry, B. Harbulot, D. Reid, G. Roy, S. Roy and G. Stewart, "Meeting the Design Challenges of nanoCMOS Electronics through Secure, Large-scale Simulation and Data Management," EGEE User Conference: Istanbul Turkey, Oct. 2008.
  • R. O. Sinnott, C. Bayliss, C. Millar, G. Stewart, G. Roy, S. Roy, D. Reid, B. Harbulot, C. Davenhall, A. Asenov and J. Watt, "Secure, Performance-Oriented Data Management for nanoCMOS Electronics," in Proc. e-Science 2008 Conference, Indiana, USA,
  • X. Wang, B. Cheng, S. Roy and A. Asenov, "Simulation of Strain Enhanced Variability in nMOSFETs," in Proc. Ultimate Integration on Silicon, Udine Italy, Mar. 12-14, 2008, pp. 89–92.
  • X. Wang, S. Roy and A. Asenov, "Impact of Strain on LER Variability in bulk MOSFETs," in Proc. 38th European Solid-State Device Research Conference (ESSDERC), Edinburgh Scotland U.K. Sept. 15-19, 2008, pp. 190–193.
  • X. Wang, S. Roy and A. Asenov, "High Performance MOSFET Scaling Study from Bulk 45 nm Technology Generation," in Proc. 9th International Conference on Solid-State and Integrated-Circuit Technology (ICSICT), Beijing China, Oct. 20-23, 2008, pp. 484–487.

2007

  • A. Asenov, C. Millar, S. Roy, D. R. S. Cumming, R. O. Sinnott, G. Stewart, A. F. Murray, D. Berry, A. M. Tyrrell, J. Hilder, S. Furber, S. Pickles, M. McKeown, M. Zwolinski and D. De Roure, "Meeting the Design Challenges of nano-CMOS Electronics," Third International Nanotechnology Conference on Communication and Cooperation: Apr. 16-17, 2007.
  • B. Cheng, S. Roy and A. Asenov, "CMOS 6-T SRAM cell design subject to ''atomistic" fluctuations," Solid-State Electronics, Vol. 51, No. 4, pp. 565–571, 2007.
  • B. Cheng, S. Roy and A. Asenov, "The scalability of 8T-SRAM cells under the influence of intrinsic parameter fluctuations," E-MRS IUMRS ICEM 2006 Spring Meeting, Symposium E p1 35: Sept. 11-13, 2007.
  • B. Cheng, S. Roy and A. Asenov, "Statistical compact model parameter extraction strategy for intrinsic parameter fluctuations," in Proc. Simulation of Semiconductor Processes and Devices, T. Graser and S. Selberherr, Eds., Vienna, Austria, Sept. 2007, pp. 301–304.
  • B. Cheng, S. Roy and A. Asenov, "Impacts of Random Dopant Fluctuation on Nanometer CMOS Logic Styles," in Proc. 8th International Conference on Ultimate Integration on Silicon, Leuven, Belgium, Mar. 15-16, 2007, pp. 25–28.
  • T. D. Drysdale, A. R. Brown, G. Roy, S. Roy and A. Asenov, "Interconnect variability within standard cells," 12th International Workshop on Computational Electronics: Oct. 8-10, 2007.
  • T. D. Drysdale, A. R. Brown, S. Roy, G. Roy and A. Asenov, "Capacitance variability of short range interconnects," Journal of Computational Electronics, Dec. 2007.
  • G. Ferrari, J. R. Watling, S. Roy, J. R. Barker, P. Zeitzoff, G. Bersuker and A. Asenov, "On the Impact of High-k Gate Stacks on Mobility: A Monte Carlo Study Including Coupled SO Phonon-plasmon Scattering," J. Computational Electronics, 2007.
  • G. Ferrari, J. R. Watling, S. Roy, J. R. Barker and A. Asenov, "Beyond SiO2 technology: Simulation of the impact of high-kappa dielectrics on mobility," Journal of Non-Crystalline Solids, Vol. 353, No. 5-7, pp. 630–634, 2007.
  • L. Han, R. O. Sinnott, G. Stewart, A. Asenov, S. Roy, G. Roy, C. Millar and D. Berry, "Towards a Grid-Enabled Simulation Framework for Nano-CMOS Electronics," IEEE e-Science 2007 Conference: 2007.
  • J. V. Magill and S. Roy, "Chips for everyone: developing creativity in engineering and initial teacher education," Engineering Education, Vol. 2, No. 1, pp. 40–46, 2007.
  • S. Markov, A. R. Brown, B. Cheng, G. Roy, S. Roy and A. Asenov, "Three-dimensional statistical simulation of gate leakage fluctuations due to combined interface roughness and random dopants," Japanese Journal of Applied Physics Part 1-Regular Papers Brief Communications & Review Papers, Vol. 46, No. 4B, pp. 2112–2116, 2007.
  • S. Markov, N. Barin, C. Fiegna, S. Roy, E. Sangiorgi and A. Asenov, "Analysis of silicon dioxide transitional region in MOS structures," in Proc. Simulation of Semiconductor Processes and Devices, T. Graser and S. Selberherr, Eds., Vienna, Austria, Sept. 2007, pp. 149–152.
  • S. Markov, S. Roy, C. Fiegna, E. Sangiorgi and A. Asenov, "Band-gap and permittivity change at high-k gate stack interfaces - device perspective," 38th IEEE Semiconductor Interface Specialists Conference: 2007.
  • C. Millar, S. Roy, A. R. Brown and A. Asenov, "Simulating the bio-nanoelectronic interface," Journal of Physics-Condensed Matter, Vol. 19, No. 21, 2007.
  • C. Millar, S. Roy, O. Beckstein, M. S. P. Sansom and A. Asenov, "Continuum versus particle simulation of model nano-pores," Journal of Computational Electronics, Vol. 6, pp. 367–371, 2007.
  • C. Millar, R. Madathil, O. Beckstein, M. S. P. Sansom, S. Roy and A. Asenov, "Brownian simulation of charge transport in alpha-haemolysin," 12th International Workshop on Computational Electronics: Oct. 8-10, 2007.
  • C. Riddet, A. R. Brown, C. L. Alexander, J. R. Watling, S. Roy and A. Asenov, "3-D Monte Carlo simulation of the impact of quantum confinement scattering on the magnitude of current fluctuations in double gate MOSFETs," IEEE Transactions on Nanotechnology, Vol. 6, No. 1, pp. 48–55, 2007.
  • C. Riddet, A. R. Brown, S. Roy and A. Asenov, "Boundary conditions for density gradient corrections in 3D Monte Carlo simulations," 12th International Workshop on Computational Electronics: Oct. 8-10, 2007.
  • S. Roy, B. Cheng and A. Asenov, "Impact of Intrinsic Parameter Fluctuations in nano-CMOS Devices on Circuits and Systems," International Journal of High Speed Electronics and Systems, Vol. 17, No. 3, pp. 501–508, 2007.
  • K. Samsudin, F. Adamu-Lema, A. R. Brown, S. Roy and A. Asenov, "Combined sources of intrinsic parameter fluctuations in sub-25 nm generation UTB-SOI MOSFETs: A statistical simulation study," Solid-State Electronics, Vol. 51, No. 4, pp. 611–616, 2007.
  • R. O. Sinnott, A. Asenov, A. R. Brown, C. Millar, S. Roy, G. Roy and G. Stewart, "Grid Infrastructures for the Electronics Domain: Requirements and Early Prototypes from an EPSRC Pilot Project," in Proc. UK e-Science All Hands Meeting, Nottingham, UK, 2007, pp. 509–516.

2006

  • B. Cheng, S. Roy and A. Asenov, "Low power, high density CMOS 6-T SRAM cell design subject to ‘atomistic’ fluctuations," in Proc. Proc. ULIS 2006, ISBN:88-900874-0-8, p. 33.
  • B. Cheng, S. Roy, G. Roy, A. R. Brown and A. Asenov, "Design Consideration of 6-T SRAM towards the End of Bulk CMOS Technology Scaling Subjected to Random Dopant Fluctuation," in Proc. Proc 36th European Solid-State Device Research Conference (ESSDERC),
  • B. Cheng, S. Roy and A. Asenov, "The Impact of Intrinsic Parameter Fluctuations on Decananometer Circuits, and Circuit Modelling Techniques," in Proc. International Conference - Mixed Design of Integrated Circuits and Systems (MIXDES 2006), June.
  • B. Cheng, S. Roy and A. Asenov, Eds., Impact of Random Dopant Fluctuation on Bulk CMOS 6-T SRAM Scaling, 2006, Montreux, Switzerland,
  • G. Ferrari, J. R. Watling, S. Roy, J. R. Barker and A. Asenov, "Beyond SiO2 technology: The impact of high-k dielectrics," ser. 6 th symposium SiO 2 , advanced dielectrics and related devices : SiO2006,
  • G. Ferrari, J. R. Watling, S. Roy, J. R. Barker, P. Zeitzoff, G. Bersuker and A. Asenov, "Monte Carlo study of mobility in Si devices with HfO2 based oxides," ser. E-MRS IUMRS ICEM 2006, Nice, France, p. i.
  • G. Ferrari, J. R. Watling, S. Roy, J. R. Barker, P. Zeitzoff, G. Bersuker and A. Asenov, "On the impact of high-k gate stacks on mobility: a Monte Carlo study including coupled SO phonon-plasmon scattering," ser. 11th International Workshop on Computational Electronics, IWCE 2006, Vienna, Austria, p. 111.
  • G. Ferrari, J. R. Watling, S. Roy, J. R. Barker, P. Zeitzoff, G. Bersuker and A. Asenov, "Monte Carlo study of mobility in Si devices with HfO2-based oxides," Materials Science in Semiconductor Processing, Vol. 9, No. 6, pp. 995–999, 2006.
  • J. V. Magill and S. Roy, "Chips for everyone ? an innovative approach to development of public engagement events," ser. Participatory approaches in Science and Technology,
  • S. Markov, A. R. Brown, B. Cheng, G. Roy, S. Roy and A. Asenov, "3D statistical simulation of gate leakage fluctutations due to combined interface roughness and random dopants," in Proc. Solid-State Devices and Materials (SSDM), Yokohama, Japan, Sept. 12-15, 2006, pp. 362–363.
  • C. Millar, S. Roy and A. Asenov, "Simulation of Bio-Nano-CMOS devices," ser. E-MRS IUMRS ICEM 2006, Nice, France, p. i.
  • C. Millar, S. Roy, O. Beckstein, M. S. P. Sansom and A. Asenov, "Continuum versus particle simulation of model nano-pores," ser. 11th International Workshop on Computational Electronics, IWCE 2006, Vienna, Austria, p. 367.
  • C. Millar, S. Roy, O. Beckstein, M. S. P. Sansom and A. Asenov, "Continuum Vs. Particle Simulations of Model Nano-Pores," J. Computational Electronics, 2006.
  • C. Millar, A. Asenov and S. Roy, "P3M Modelling of Biological Systems," in Proc. E-MRS IUMRS ICEM 2006 Spring Meeting, Symposium Q, July.
  • S. H. Paluchowski, M. J. Milgrew, S. Roy and D. R. S. Cumming, "CMOS combinational logic design for GaAs heterostructure MOSFET technology," Proc. Conf. Optoelectronic and Microelectronic Materials and Devices (COMMAD): Perth, Australia, Dec. 2006.
  • C. Riddet, A. R. Brown, C. L. Alexander, S. Roy and A. Asenov, "Efficient density gradient quantum corrections for 3D Monte Carlo simulations," ser. International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2006, California,USA,
  • G. Roy, A. R. Brown, F. Adamu-Lema, S. Roy and A. Asenov, "Simulation study of individual and combined sources of intrinsic parameter fluctuations in conventional nano-MOSFETs," IEEE Transactions on Electron Devices, Vol. 53, No. 12, pp. 3063–3070, 2006.
  • G. Roy, A. R. Brown, F. Adamu-Lema, S. Roy and A. Asenov, "Intrinsic Parameter Fluctuations in Conventional MOSFETs until end of the ITRS," Journal of Physics Conferences Series, Vol. 38, pp. 188–191, 2006.
  • S. Roy, B. Cheng and A. Asenov, "Impact of intrinsic parameter fluctuation in nano-CMOS devices on circuits and systems," ser. International Topical Workshop on Tera- and Nano- Devices: Physics and Modelling, pp. 24–25.
  • K. Samsudin, F. Adamu-Lema, A. R. Brown, S. Roy and A. Asenov, "Intrinsic parameter fluctuations in sub-10nm generation UTB SOI MOSFETs," ser. 7 th European Workshop on ULtimate Integration of Silicon , ULIS 2006, pp. 93–96.
  • K. Samsudin, B. Cheng, A. R. Brown, S. Roy and A. Asenov, "Sub-25 nm UTB SOISRAM cell under the influence of discrete random dopants," Solid-State Electronics, Vol. 50, No. 4, pp. 660–667, 2006.
  • K. Samsudin, B. Cheng, A. R. Brown, S. Roy and A. Asenov, "Integrating intrinsic parameter fluctuation description into BSIMSOI to forecast sub-15 nm UTB SOI based 6T SRAM operation," Solid-State Electronics, Vol. 50, No. 1, pp. 86–93, 2006.
  • R. O. Sinnott, A. Asenov, D. Berry, S. Roy, S. Furber, D. R. S. Cumming, A. Tyrrell, A. F. Murray, M. Zwolinski, S. Pickles and C. Millar, "Meeting the Design Challenges of nanoCMOS Electronics: An Introduction to an EPSRC Pilot Project," in Proc. UK e-Science All Hands Meeting, Sept. 2006,
  • J. J. Trinder, J. V. Magill and S. Roy, "A call to arms for handheld devices," ser. International Computer Assisted Assessment Conference, pp. 411–416.

2005

  • J. R. Barker, J. R. Watling, A. R. Brown, S. Roy, P. Zeitzoff, G. Bersuker and A. Asenov, "Monte Carlo study of couples SO phonon-plasmon scattering in Si MOSFETs with high-k dielectric gate stacks: hot electron and disorder effects," in Proc. 14th International Conference on Hot Carriers in Semiconductors (HCIS14), July p. TU 4–2.
  • A. R. Brown, A. Asenov, S. Roy and J. R. Barker, "Parallel 3D finite element power semiconductor device simulator based on topologically rectangular grid," in Proc. Simulation of Semiconductor Devices and Processes, 2005, pp. 336–339.
  • B. Cheng, S. Roy, G. Roy, F. Adamu-Lema and A. Asenov, "Impact of intrinsic parameter fluctuations in decanano MOSFETs on yield and functionality of SRAM cells," Solid-State Electronics, Vol. 49, No. 5, pp. 740–746, 2005.
  • B. Cheng, S. Roy, A. Martinez and A. Asenov, "Impact of Oxide Thickness Fluctuation on MOSFETs Gate Tunnelling," in Proc. Proc SSDM (Japan 2005),
  • N. H. Hamid, A. F. Murray, D. I. Laurenson and S. Roy, "Probabilistic neural computing with future deep sub-micrometer MOSFETs: A modelling approach," ser. IEEE International Symposiumon Circuits And Systems 2005, Kobe, Japan,
  • C. Millar, A. Asenov and S. Roy, "Self-consistent particle simulation of ion channels," Journal of Computational and Theoretical Nanoscience, Vol. 2, No. 1, pp. 56–67, 2005.
  • C. Millar, A. Asenov, S. Roy and A. R. Brown, "Simulating the bio-nano-CMOS interface," ser. 5th IEEE conference on Nanotechnology, Nagoya, Japan,
  • C. Millar, A. Asenov, A. R. Brown and S. Roy, "Tracking the propagation of individual ions through nano-MOSFETs," J. Computational Electronics, Vol. 4, No. 1-2, pp. 185–188, Apr. 2005.
  • C. Millar, A. Asenov and S. Roy, "Simulating Ion Channels and their Nano-CMOS Interface," in Proc. U.K.-Korea Joint Symposium on Bio-Technology, Feb.
  • C. Riddet, A. R. Brown, C. L. Alexander, J. R. Watling, S. Roy and A. Asenov, "Impact of quantum confinement scattering on the magnitude of current fluctuations in double gate MOSFETs," ser. Silicon Nanoelectronics Workshop 2005,
  • G. Roy, F. Adamu-Lema, A. R. Brown, S. Roy and A. Asenov, "Simulation of combined sources of intrinsic parameter fluctuations in 'real' 35nm MOSFET," ser. European Solid-State Device Research Conference 2005 - ESSDERC2005, Grenoble, France,
  • G. Roy, F. Adamu-Lema, A. R. Brown, S. Roy and A. Asenov, "Intrinsic parameter fluctuations in conventional MOSFETs until the end of the ITRS," ser. New Phenomena in Mesoscopic Structures - 7 (NPMS) and the fifth in the series of Surfaces and Interfaces of Mesoscopic Devices (SIMD), NPMS-7/ SIMD-5,
  • S. Roy and A. Asenov, "Where do the dopants go?" Science, Vol. 309, No. 5733, pp. 388–390, 2005.
  • K. Samsudin, B. Cheng, A. R. Brown, S. Roy and A. Asenov, "Impact of random dopant induced fluctuations on sub-15nm UTB SOI 6T SRAM cells," 2005 IEEE International SOI Conference, Proceedings, pp. 61–62, 2005.
  • K. Samsudin, B. Cheng, A. R. Brown, S. Roy and A. Asenov, "UTB SOI SRAM cell stability under the influence of intrinsic parameter fluctuation," ser. European Solid-State Device Research Conference 2005 - ESSDERC2005, Grenoble, France, pp. 553–556.
  • K. Samsudin, B. Cheng, A. R. Brown, S. Roy and A. Asenov, "Impact of body thickness fluctuation in nanometre scale UTB SOI MOSFETs on SRAM cell functionality," in Proc. 6th European Conference on Ultimate Integration of Silicon (ULIS05), Apr.
  • J. J. Trinder, J. V. Magill and S. Roy, "Portable assessment: towards ubiquitous education," International Journal of Electrical Engineering Education, Vol. 42, No. 1, pp. 73–78, 2005.
  • J. J. Trinder, J. V. Magill and S. Roy, "Mobile technologies and systems," in Mobile learning: A handbook for educators and trainers, T. A. J. Kukulska-Hulme, Ed. Routledge, London, 2005,
  • J. J. Trinder, J. V. McGill and S. Roy, "Expect the unexpected: practicalities and problems of a PDA project," in Mobile learning: A handbook for educators and trainers, T. A. J. Kukulska-Hulme, Ed. Routledge, London, 2005,
  • J. J. Trinder, J. V. Magill and S. Roy, "Mobile Learning: A handbook for educators and trainers," Routledge, 2005,
  • J. R. Watling, L. Yang, A. Asenov, J. R. Barker and S. Roy, "Impact of high-k dielectric HfO2 on the mobility and device performance of sub-100-nm nMOSFETs," IEEE Transactions on Device and Materials Reliability, Vol. 5, No. 1, pp. 103–108, 2005.
  • J. R. Watling, A. Asenov, J. R. Barker and S. Roy, "The impact of the interfacial layer and structure of the k dielectric (HfO2) on device performance," ser. Advanced Gate Stack Engineering Conference,
  • J. R. Watling, A. Asenov, J. R. Barker and S. Roy, "Transport in the presence of high-k dielectrics," ser. Material Modelling International Workshop,

2004

  • F. Adamu-Lema, S. Roy, A. R. Brown, A. Asenov and G. Roy, "Intrinsic parameter fluctuations in conventional MOSFETs at the scaling limit: a statistical study," in Proc. 10th International Workshop on Computational Electronics (IWCE), West Lafayette, IN, USA, Oct. 24-27, 2004, pp. 44–45.
  • F. Adamu-Lema, G. Roy, A. R. Brown, A. Asenov and S. Roy, "Intrinsic parameter fluctuations in conventional MOSFETs at the scaling limit:a statistical study," J. Computational Electronics, Vol. 3, pp. 203–206, 2004.
  • A. Asenov, G. Roy, C. L. Alexander, A. R. Brown, J. R. Watling and S. Roy, "Quantum mechanical and transport aspects of resolving discrete charges in nano-CMOS device simulation," in Proc. 4th IEEE Conference on Nanotechnology (IEEE Nano), Munich, Germany, Aug. 17-19, 2004, pp. 334–336.
  • B. Cheng, S. Roy and A. Asenov, "The impact of random dopant effects on SRAM cells," ser. 30th European Solid-State Circuits Confernece ESSCIRC 2004, pp. 219–222.
  • B. Cheng, S. Roy and F. Adamu-Lema, "Impact of intrinsic parameter fluctuations in decanano MOSFETs on yield and functionality of SRAM cells," ser. 5th European Workshop on Ultimate Integration of Silicon - ULIS04, pp. 23–26.
  • B. Cheng, S. Roy and A. Asenov, "Compact model strategy for studying the impact of intrinsic parameter fluctuations on circuit performance," ser. 11th International Conference Mixed Design of Integrated Circuits and Systems, pp. 51–55.
  • A. Lee, A. R. Brown, A. Asenov and S. Roy, "RTS amplitudes in decanano n-MOSFETs with conventional and high- k gate stacks," ser. Conference on Solid State Devices and Materials - SSDM 2004,
  • A. Lee, A. R. Brown, A. Asenov and S. Roy, "RTS amplitudes in decanano n-MOSFETs with conventional and high-k gate stacks," J. Computational Electronics, Vol. 3, pp. 247–250, 2004.
  • A. Lee, A. R. Brown, A. Asenov and S. Roy, "RTS amplitudes in decanano n-MOSFETs with conventional and high-k gate stacks," in Proc. International Workshop on Computational Electronics (IWCE 10), Oct. pp. 159–160.
  • C. Millar, A. Asenov, A. R. Brown and S. Roy, "Tracking the propagation of individual ions through ion channels with nano-MOSFETs," in Proc. 10th International Workshop on Computational Electronics (IWCE), ser. International workshop on Computational Electronics, IWCE-10, West Lafayette, IN, USA, Oct. 24-27, 2004, pp. 205–206.
  • C. Riddet, A. R. Brown, C. L. Alexander, J. R. Watling, S. Roy and A. Asenov, "Scattering from body thickness fluctuations in double gate MOSFETs. An ab initio Monte Carlo simulation study," ser. International workshop on Computational Electronics, IWCE-10, West Lafayette, USA, pp. 194–195.
  • C. Riddet, A. R. Brown, C. L. Alexander, J. R. Watling, S. Roy and A. Asenov, "Scattering From Body Thickness Fluctuations in Double Gate MOSFETs. An ab initio Monte Carlo Study." J. Comp. Elec, Vol. 3, pp. 341–345, 2004.
  • J. J. Trinder, J. V. Magill and S. Roy, "Old hat in a brave new world," ser. 8th International Computer Aided Assessment 2004,
  • J. R. Watling, L. Yang, M. Boriçi, R. C. W. Wilkins, A. Asenov, J. R. Barker and S. Roy, "The impact of interface roughness scattering and degeneracy in relaxed and strained Si n-channel MOSFETs," Solid-State Electronics, Vol. 48, No. 8, pp. 1337–1346, 2004.
  • J. R. Watling, L. Yang, A. Asenov, J. R. Barker and S. Roy, "Impact of high- k dielectric HfO2 on the mobility and device performance of sub-100nm n-MOSFETs," ser. International workshop on electrical characterization and reliability of high- k devices, Austin, USA,
  • L. Yang, A. Asenov, J. R. Watling, M. Boriçi, J. R. Barker, S. Roy, K. Elgaid, I. G. Thayne and T. Hackbarth, "Impact of device geometry and doping strategy on linearity and RF performance in Si/SiGe MODFETs," Microelectronics Reliability, Vol. 44, No. 7, pp. 1101–1107, 2004.
  • L. Yang, J. R. Watling, A. Asenov, J. R. Barker and S. Roy, "Mobility and device performance in conventional and strained Si MOSFETs with high-k stack," ser. International Conference on Simulation of Semiconductor Processes and Devices, SISPAD, pp. 199–202.
  • L. Yang, J. R. Watling, A. Asenov, J. R. Barker and S. Roy, "Sub-100nm strained Si CMOS: Device performance and circuit behavior," ser. 7th International Conference on Solid State and Intergrated Circuit Technology,
  • L. Yang, J. R. Watling, R. C. W. Wilkins, M. Boriçi, J. R. Barker, A. Asenov and S. Roy, "Si/SiGe heterostructure parameters for device simulations," Semiconductor Science and Technology, Vol. 19, No. 10, pp. 1174–1182, 2004.
  • L. Yang, J. R. Watling, A. Asenov, J. R. Barker and S. Roy, "Device performance in conventional and strained Si MOSFETs with high-κ gate stack," in Proc. IEEE International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Sept.

2003

  • B. Cheng, S. Roy, G. Roy and A. Asenov, "Integrating 'atomistic' intrinsic parameter fluctuations into compact model circuit analysis," ser. ESSDERC 2003 - European Solid-State Device Research Conference, pp. 437–440.
  • L. C. Chirwa, P. A. Hammond, S. Roy and D. R. S. Cumming, "Electromagnetic radiation from ingested sources in the human intestine between 150 MHz and 1.2 GHz," IEEE Transactions on Biomedical Engineering, Vol. 50, No. 4, pp. 484–492, 2003.
  • L. C. Chirwa, P. A. Hammond, S. Roy and D. R. S. Cumming, "Radiation from ingested wireless devices in bio-medical telemetry bands," Electronics Letters, Vol. 39, No. 2, pp. 178–179, 2003.
  • L. C. Chirwa, S. Roy and D. R. S. Cumming, "Determination of electromagnetic radiation from ingested sources in the human intestine using FDTD between 150MHz and 1.2GHz," Electronics Letters, Vol. 50, No. 4, pp. 484–492, Apr. 2003.
  • A. Lee, A. R. Brown, A. Asenov and S. Roy, "RTS noise simulations of decanano MOSFETs subject to atomic scale structure variations," ser. NPMS-6/SIMD-4 Sixth International Conference on New Phenomena in Mesoscopic Systems, and Fourth International Conference on Surfaces and Interfaces of Mesoscopic Devices, Maui, Hawaii,
  • A. Lee, A. R. Brown, A. Asenov and S. Roy, "RTS noise simulations of decanano MOSFET's subject to atomic scale structure variations." Superlattices and Microstructures, Vol. 34, No. 3-6, 2003.
  • C. Millar, A. Asenov and S. Roy, "Brownian ionic channel simulation," in Proc. International Workshop on Computational Electronics, Champaign Urbana, USA,
  • C. Millar, A. Asenov and S. Roy, "Brownian dynamics based particle mesh simulation of ionic solutions and channels," ser. Proceedings Modeling and Simulation of Microsystems 2003 - MSM 03,
  • C. Millar, A. Asenov and S. Roy, "Brownian ionic channel simulation," Journal of Computational Electronics, Vol. 2, pp. 257–262, 2003.
  • C. Millar, A. Asenov and S. Roy, "Brownian Dynamics Based Simulation Of Ionic Solutions And Channels," in Proc. Nanotech 2003: Technical Proceedings, Cambridge,
  • G. Roy, A. R. Brown, A. Asenov and S. Roy, "Bipolar quantum corrections in resolving individual dopants in atomistic, intrinsic parameter fluctuations into compact model circuit analysis," ser. NPMS-6/SIMD-4 Sixth International Conference on New Phenomena in Mesoscopic Systems, and Fourth International Conference on Surfaces and Interfaces of Mesoscopic Devices, Maui, Hawaii, pp. 34–35.
  • G. Roy, A. R. Brown, A. Asenov and S. Roy, "Quantum aspects of resolving discrete charges in atomistic device simulation," Journal of Computational Electronics, Vol. 2, pp. 323–327, 2003.
  • G. Roy, A. R. Brown, A. Asenov and S. Roy, "Bipolar quantum corrections in resolving individual dopants in 'atomistic' device simulations," Superlattices and Microstructures, Vol. 34, No. 3-6, pp. 327–334, 2003.
  • G. Roy, A. R. Brown, A. Asenov and S. Roy, "Quantum aspects of resolving discrete charges in “atomistic” device simulation," in Proc. Extended abstracts of the International Workshop on Computational Electronics IWCE-9,
  • S. Roy, A. Lee, A. R. Brown and A. Asenov, "Application of quasi-3D and 3D MOSFET simulations in the atomistic regime," ser. International Workshop on Computational Electronics - IWCE 9,
  • S. Roy, B. Cheng, G. Roy and A. Asenov, "A methodology for introducing atomistic parameter fluctuations into compact device models for circuit simulation," Journal of Computational Electronics, Vol. 2, pp. 427–431, 2003.
  • S. Roy, A. Lee, A. R. Brown and A. Asenov, "Application of quasi-3D and 3D MOSFET simulations in the atomistic regime," Journal of Computational Electronics, Vol. 2, pp. 423–426, 2003.
  • S. Roy, B. Cheng, G. Roy and A. Asenov, "A methodology for introducing “atomistic” parameter fluctuations into compact device models for circuit simulation," in Proc. Extended abstracts of the International Workshop on Computational Electronics IWCE-9,
  • L. Yang, J. R. Watling, M. Boriçi, R. C. W. Wilkins, A. Asenov, J. R. Barker and S. Roy, "Simulations of scaled sub-100nm strained Si/SiGe p-channel MOSFETs," Journal of Computational Electronics, Vol. 2, pp. 363–368, 2003.
  • L. Yang, A. Asenov, J. R. Watling, M. Boriçi, J. R. Barker, S. Roy, K. Elgaid, I. G. Thayne and T. Hackbarth, "Optimisation of sub 11nm Si/SiGe MODFETs for high linearity applications," ser. 14th Workshop on Modeling and Simulation of Electron Devices, pp. 41–44.
  • L. Yang, A. Asenov, J. R. Watling, M. Boriçi, J. R. Barker, S. Roy, K. Elgaid, I. G. Thayne and T. Hackbarth, "Optimizations of sub-100nm Si/SiGe MODFETs for high linearity RF applications," in Proc. Proceedings of the 2003 IEEE Conference on Electron Device and Solid-State Circuits (EDSSC03), Dec. pp. 331–334.
  • L. Yang, J. R. Watling, M. Boriçi, R. C. W. Wilkins, A. Asenov, J. R. Barker and S. Roy, "Simulations of scaled sub-100nm strained Si/SiGe p-channel MOSFETs," in Proc. 9th IEEE International Workshop of Computational Electronics (IWCE),
  • L. Yang, A. Asenov, J. R. Watling, M. Boriçi, J. R. Barker, S. Roy, K. Elgaid, I. G. Thayne and T. Hackbarth, "A simulation study of high linearity Si/SiGe HFETs," in Proc. Proceedings of the 14th Workshop on Modelling and Simulation of Electron Device (MSED03), Oct. pp. 41–44.

2002

  • A. Asenov, M. Jaraiz, S. Roy, G. Roy, F. Adamu-Lema, A. R. Brown, V. Moroz and R. Gafiteanu, "Integrated atomistic process and device simulation of decananometre MOSFETs," in Proc. Simulation of Semiconductor Processes and Devices, Kobe, Japan, Sept. 4-6, 2002, pp. 87–90.
  • L. C. Chirwa, P. A. Hammond, S. Roy and D. R. S. Cumming, "Electromagnetic radiation from ingested sources in the human intestine," ser. 2nd.Annual.International IEEE EMBS.Special.Topic.Conference on Microtechnologies.in Medicine and Biology. Madison, USA, pp. 309–313.
  • K. Kalna, S. Roy, A. Asenov, K. Elgaid and I. G. Thayne, "Scaling of pseudomorphic high electron mobility transistors to decanano dimensions," Solid State Electronics, Vol. 46, No. 5, pp. 631–638, 2002.
  • S. Kaya, A. Asenov and S. Roy, "On the breakdown of universal mobility curves: a Brownian 3D simulation study," J. Computational Electronics, Vol. 1, pp. 375–379, 2002.
  • S. Kaya, A. Asenov and S. Roy, "Breakdown of universal mobility curves in sub-100nm MOSFETs," IEEE Trans. Nanotechnology, Vol. 1, pp. 260–264, 2002.
  • S. Kaya, A. Asenov and S. Roy, "Breakdown of universal mobility curves in sub-100 nm MOSFETs," in Proc. Proceedings of the Silicon Nanoelectronics Workshop,
  • C. Millar, A. Asenov and S. Roy, "A Generic Particle-Mesh Framework For The Simulation Of Ionic Channels," J. Computational Electronics, Vol. 1, No. 3, pp. 405–409, 2002.
  • S. Roy, J. J. Trinder and J. V. Magill, "Portable learning and assessment - towards ubiquitous education," in Proc. European Workshop on Mobile and Contextual Learning - mLearn 2002, June.
  • L. Yang, J. R. Watling, R. C. W. Wilkins, A. Asenov, J. R. Barker, S. Roy and T. Hackbarth, "Scaling study of Si/SiGe MOSFETs for RF applications," ser. 10th International Symposium on Electron Devices for Microwave and Optoelectronic Devices ( EDMO 2002), Manchester, UK, pp. 101–106.

2001

  • S. Kaya, A. Asenov and S. Roy, "Breakdown of Universal Mobility Curves in sub-100nm MOSFETs," ser. IWCE-8,
  • M. McAlpine, J. V. Magill, S. Roy, J. J. Trinder and D. Whittington, "A dynamic resource for on-line formative assessment in engineering," in Proc. Proceedings of ALT-C, Sept.
  • C. Millar, A. Asenov, S. Roy and J. M. Cooper, "Generic Particle-Mesh Framework for the Simulation of Ionic Channels," in Proc. Proceedings of the International Workshop on Computational Electronics IWCE01,
  • M. J. Palmer, G. Braithwaite, T. J. Grasby, P. J. Phillips, M. J. Prest, E. H. C. Parker, T. E. Whall, C. P. Parry, A. M. Waite, A. G. R. Evans, S. Roy, J. R. Watling, S. Kaya and A. Asenov, "Effective mobilities in pseudomorphic Si/SiGe/Si p-channel metal-oxide-semiconductor field-effect transistors with thin silicon capping layers," Applied.Physics.Letters. Vol. vol.78, No. 10, pp. 1424–1426, 2001.

2000

  • K. Kalna, S. Roy, A. Asenov, K. Elgaid and I. G. Thayne, "RF analysis of aggressively scaled pHEMTs," in Proc. Proceedings of ESSDERC 2000, pp. 156–159.
  • S. Roy, S. Kaya, A. Asenov and J. R. Barker, "RF analysis methodology for Si and SiGe FETs based on transient Monte Carlo simulations," IEICE Transactions on Electronics, Vol. VI. E83-C, No. 8, pp. 1224–1227, 2000.

1999

  • A. Asenov, S. Roy and J. R. Watling, "SiGe for RF applications," in Proc. IEE Colloquium Advances in Semiconductor Devices, Jan.
  • S. Babiker, A. Asenov, S. Roy and S. P. Beaumont, "Strain engineered pHEMTs on virtual substrates," Solid-State Electronics, Vol. 43, pp. 1281–1288, 1999.
  • S. Roy, S. Kaya, A. Asenov and J. R. Barker, "RF analysis methodology for Si and SiGe FETs based on transient Monte Carlo simulations," in Proc. Proceedings of SISPAD'99,

1998

  • A. Asenov, A. R. Brown and S. Roy, "Parallel semiconductor device simulation: from power to atomistic devices," in Proc. 6th International Workshop on Computational Electronics (IWCE), Osaka, Japan, Oct. 19-21, 1998, pp. 58–61.
  • A. Asenov, A. R. Brown, S. Roy and J. R. Barker, "Topologically rectangular grids in the parallel simulation of semiconductor devices," VLSI Design, Vol. 6, No. 1-4, pp. 91–95, 1998.
  • S. Babiker, A. Asenov, S. Roy, J. R. Barker and S. P. Beaumont, "Strain engineered InxGa1-xAs channel pHEMTs on virtual substrates: A Simulation study," in Proc. Proceedings of the International Workshop on Computational Electronics IWCE98, pp. 178–181.
  • S. Roy, S. Kaya, S. Babiker, A. Asenov and J. R. Barker, "Monte Carlo investigation of optimal device architectures for SiGe FETs," in Proc. Proceedings of the International Workshop on Computational Electronics IWCE98, pp. 210–213.
  • S. Roy, A. Asenov, S. Babiker, J. R. Barker and S. P. Beaumont, "RF performance of Si/SiGe MODFETs: a simulation study," VLSI Design, Vol. 8, No. 1-4, pp. 325–330, 1998.

1997

  • A. Asenov, A. R. Brown, S. Roy, C. R. Arokianathan, J. H. Davies and J. R. Barker, "Parallel 3D Simulation of Semiconductor Devices," in Proc. 2nd NASA Device Modeling Workshop, Ames Research Center, Moffet Field, CA, USA, 1997, pp. 85–99.
  • J. R. Barker, S. Roy, S. Babiker and A. Asenov, "Circuit and architecture issues for single-electron devices," in Proc. Proceedings of the International Conference on Quantum Devices and Circuits, pp. 233–241.
  • S. Roy, A. Asenov, S. Babiker, J. R. Barker and S. P. Beaumont, "Monte Carlo analysis of Si/SiGe MODFET performance potential," Physica Status Solidi (b), Vol. 204, p. 525, 1997.
  • S. Roy, A. Asenov, S. Babiker, J. R. Barker and S. P. Beaumont, "RF performance of strained Si MODFETs and MOSFETs on ‘virtual’ SiGe substrates: A Monte Carlo study," in Proc. Proceedings of ESSDERC97, pp. 192–195.

1996

  • A. Asenov, A. R. Brown, S. Roy and J. R. Barker, "Topically Rectangular Finite Element Grids in the Parallel Simulation of Semiconductor Devices," in Proc. Computational Mechanics in UK, 4th ACME Annual Conference, Jan. 4-5, 1996, pp. 49–52.
  • S. Roy, A. Asenov, A. R. Brown and J. R. Barker, "Partitioning of Topologically Rectangular Finite Element Grids," in Proc. Proc. Computational Mechanics in UK, 4th ACME Annual Conference, pp. 41–44.
  • S. Roy, A. Asenov and J. R. Barker, "Optimum Partitioning of Topologically Rectangular Grids," in Proc. Proc. Int. Conf. HPSN Challenges in Telecomp and Telecom: Parallel Simulation of Complex Systems and Large-Scale applications (EUROSIM’96), pp. 179–185.

1995

  • A. R. Brown, A. Asenov, S. Roy and J. R. Barker, "Development of a parallel 3D finite element power semiconductor device simulator," in Proc. IEE Colloquium on Physical Modeling of Semiconductor Devices, Digest No. 1995/064, 1995, p. 2/1–2/6.
  • A. R. Brown, A. Asenov, S. Roy and J. R. Barker, "Parallel 3D finite element power semiconductor device simulator based on topologically rectangular grid," in Proc. Simulation of Semiconductor Devices and Processes, 2005, pp. 336–339.

1993

  • S. Roy, J. R. Barker and A. Asenov, "System simulation tools for single-electronic devices," in Proc. Proceedings of the International Workshop on Computational Electronics IWCE93, pp. 275–279.

1992

  • J. R. Barker, S. Roy and S. Babiker, "22: Trajectory representations, fluctuations and stability of single electron devices," in Science and Technology of Mesoscopic Structures. Springer-Verlag, 1992, pp. 213–231.
  • J. R. Barker, J. M. R. Weaver, S. Babiker and S. Roy, "On the theory, modelling and construction of single electronic systems," in Proc. Proceedings of the International Symposium on New Phenomena in Mesoscopic Structures, Dec.