Campbell Millar

Area of work

Senior Research Fellow for ECAD and TCAD

I am currently a Senior Research fellow, with responsibilities for High Performance Computing, TCAD and ECAD in the School of Engineering at the University of Glasgow. As such I am responsible for managing the computing resources for the Device Modelling Group and providing support accross the scool. I also continue to have strong ties with the National eScience Centre at Glasgow which were developed during  my previous post as project coordinator on the nanoCMOS UK eScience pilot project.

My current research interested include the development of Statistical Circuit Simulation techniques and Compact Modelling approaches for modelling statistical variability.

Recent grants

Oct 2010 -

PANDAPanda Logo

The PAnDA project is a new four-year EPSRC (EP/I005838/1) funded project, starting in October 2010, involving the Intelligent Systems Research Group at the University of York and the Device Modelling Group at the University of Glasgow, and it is also part of a special interest group including Imperial College London and the University of Southampton. Industrial partners include Xilinx and Gold Standard Simulations Ltd.

The PAnDA project focuses upon one of the greatest challenges in nano-scale electronic design: taking the physical effects of intrinsic variability into account when the shrinking of device sizes approaches atomistic levels, in order to achieve functional circuit designs. Both process and substrate variations impose major challenges on the reliable fabrication of such small devices. These variations fall into two categories; deterministic variability, which can be accurately modelled and accounted for using specific design techniques, and stochastic variability, which can only be modelled statistically and is harder to overcome.

The proposed research aims to develop understanding of how stochastic variability will affect circuit design in deep sub-micron processes and to propose novel design methodologies to overcome these intrinsic variations. The project will involve the design and fabrication of a novel reconfigurable variability tolerant architecture, which allows variability aware design and rapid prototyping by exploiting the configuration options of the architecture. These are vital steps towards the next generation of FPGA architectures.
April 2011 -

MORDRED

The MORDRED project involves nine theoretical and experimental partners and aims to develop multiscale modelling technology, supported by comprehensive experimental characterization techniques, to study the degradation and reliability of next generation Complimentary-Metal-Oxide-Semiconductor (CMOS) devices. The project partners include Tampere University, Finland, The University of Glasgow Device Modelling Group, University College London, Vienna University of Technology, IMEC, Infineon, Gold Standard Simulations Ltd., KU Leuven Department of Physics and The Microelectronics Group in the Department of Engineering.

Publications

2013

  • B. Cheng, X. Wang, A. R. Brown, J. B. Kuang, D. Reid, C. Millar, S. Nassif and A. Asenov, "SRAM Device and Cell Co-Design Considerations in a 14nm SOI FinFET Technology," in Proc. IEEE International Symposium on Circuits and Systems (ISCAS), Beijing China, May 19-23, 2013, pp. 2339–2342.

2012

  • B. Cheng, X. Wang, A. R. Brown, C. Millar, A. Asenov, J. B. Kuang and S. Nassif, "Statistical TCAD Based PDK Development for a FinFET Technology at 14nm Technology node," in Proc. 17th International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Denver CO USA, Sept. 5-7, 2012, pp. 113–116.
  • J. Ding, P. Asenov, D. Reid, C. Millar and A. Asenov, "Statistical compact model extraction in the presence of BTI degradation," VARI 2012: June 11-12, 2012.
  • X. Wang, B. Cheng, A. R. Brown, C. Millar and A. Asenov, "Statistical Variability in 14-nm node SOI FinFETs and its Impact on Corresponding 6T-SRAM Cell Design," in Proc. 42nd European Solid-State Device Research Conference (ESSDERC), Bordeaux France, Sept. 17-21, 2012, pp. 113–116.

2011

  • M. Merrett, P. Asenov, Y. Wang, M. Zwolinski, S. Roy, C. Millar and D. Reid, "Modelling Circuit Performance Variations due to Statistical Variability: Monte Carlo Static Timing Analysis," Design, Automation and Test in Europe: Mar. 14-18, 2011.

2010

  • A. Asenov, B. Cheng, D. Dideban, U. Kovac, N. Moezi, C. Millar, G. Roy, A. R. Brown and S. Roy, "Modeling and Simulation of Transistor and Circuit Variability and Reliability," Custom Integrated Circuit Conference: San Jose, California, Sept. 19-22, 2010.
  • P. Asenov, N. A. Kamsani, D. Reid, C. Millar, S. Roy and A. Asenov, "Combining Process and Statistical Variability in the Evaluation of the Effectiveness of Corners in Digital Circuit Parametric Yield Analysis," European Solid-State Circuits Conference: Sept. 13-17, 2010.
  • P. Asenov, D. Reid, C. Millar, S. Roy, Z. Liu, S. Furber and A. Asenov, "Generic Aspects of Digital Circuit Behaviour in the Presence of Statistical Variability," European Workshop on CMOS Variability: May 26, 2010.
  • B. Cheng, D. Dideban, N. Moezi, C. Millar, G. Roy, X. Wang, S. Roy and A. Asenov, "Statistical Variability Compact Modeling Strategies for BSIM4 and PSP," IEEE Design and Test of Computers, Vol. 27, No. 2, pp. 26–35, Mar./Apr. 2010.
  • B. Cheng, D. Dideban, N. Moezi, C. Millar, G. Roy, X. Wang, S. Roy and A. Asenov, "Capturing Intrinsic Parameter Fluctuations using the PSP Compact Model," in Proc. Design, Automation and Test in Europe, Dresden, Germany, Mar. 8-12, 2010, pp. 650–653.
  • B. Cheng, N. Moezi, D. Dideban, C. Millar, S. Roy and A. Asenov, "Impact of Statistical Parameter Set Selection on Accuracy of Statistical Compact Modeling," MOS-AK Workshop: Sapienza Università di Roma, Apr. 8-9, 2010.
  • D. Dideban, B. Cheng, N. Moezi, N. A. Kamsani, C. Millar, S. Roy and A. Asenov, "Impact of Input Slew Rate on Statistical Timing and Power Dissipation Variability in nano CMOS," in Proc. Ultimate Integration on Silicon, Glasgow, Scotland, UK, Mar. 17-19, 2010, pp. 45–48.
  • N. A. Kamsani, B. Cheng, C. Millar, N. Moezi, X. Wang, S. Roy and A. Asenov, "Impact of Slew Rate Definition on the Accuracy of nanoCMOS Inverter Timing Simulations," in Proc. Ultimate Integration on Silicon, Glasgow, Scotland, UK, Mar. 17-19, 2010,
  • I. Moore, C. Millar, S. Roy and A. Asenov, Eds., Integrating drift-diffusion and Brownian simulations for sensory applications, 2010, Ultimate Integration on Silicon, Mar. 17-19, 2010.
  • D. Reid, C. Millar, S. Roy and A. Asenov, "Understanding LER-Induced MOSFET VT Variability—Part I: Three-Dimensional Simulation of Large Statistical Samples," IEEE Transactions on Electron Devices, Nov. 2010.
  • D. Reid, C. Millar, S. Roy and A. Asenov, "Understanding LER-Induced MOSFET VT Variability—Part II: Reconstructing the Distribution," IEEE Transactions on Electron Devices, Nov. 2010.
  • R. O. Sinnott, G. Stewart, A. Asenov, C. Millar, D. Reid, G. Roy, S. Roy, C. Davenhall, B. Harbulot and M. Jones, "E-Infrastructure Support for nanoCMOS Device and Circuit Simulations," Parallel and Distributed Computing and Networks: Feb. 16-18, 2010.

2009

  • B. Cheng, S. Roy, A. R. Brown, C. Millar and A. Asenov, "Evaluation of statistical variability in 32 and 22 nm technology generation LSTP MOSFETs," Solid-State Electronics, Vol. 53, No. 7, pp. 767–772, July 2009.
  • D. Reid, C. Millar, G. Roy, S. Roy and A. Asenov, "Analysis of Threshold Voltage Distribution due to Random Dopants: A 100,000 Sample 3D Simulation Study," IEEE Transactions on Electron Devices, Oct. 2009.
  • D. Reid, C. Millar, G. Roy, S. Roy and A. Asenov, "Understanding LER-induced Statistical Variability: A 35,000 Sample 3D Simulation Study," Proc. ESSDERC 2009: Sept. 14-18, 2009.
  • D. Reid, C. Millar, G. Roy, S. Roy and A. Asenov, "Efficient Simulations of 6σ VT Distributions Due to Random Discrete Dopants," Proc. ULIS 2009: Mar. 2009.
  • D. Reid, C. Millar, G. Roy, S. Roy and A. Asenov, "Statistical enhancement of combined simulations of RDD and LER variability: What can simulation of a 10^5 sample teach us?" International Electron Devices Meeting 2009: Dec. 7-9, 2009.
  • D. Reid, R. O. Sinnott, C. Millar, G. Roy, S. Roy and G. Stewart, "Enabling Cutting-edge Semiconductor Simulation through Grid Technology," Journal of the Philosophical Transactions of the Royal Society A, January 2009. Jan. 2009.

2008

  • A. Asenov, S. Roy, A. R. Brown, G. Roy, C. L. Alexander, C. Riddet, C. Millar, B. Cheng, A. Martinez, N. Seoane, D. Reid, M. Faiz. Bukhori, X. Wang and U. Kovac, "Advanced simulation of statistical variability and reliability in nano CMOS transistors," in Proc. IEDM, USA, Dec. 2008, p. 421.
  • B. Cheng, S. Roy, A. R. Brown, C. Millar and A. Asenov, "Evaluation of intrinsic parameter fluctuations in 45, 32 and 22 nm technology node LP n-MOSFETs," Proc. ESSDERC 2008: Sept. 15-19, 2008.
  • B. Cheng, S. Roy, A. R. Brown, C. Millar and A. Asenov, "Statistical Variations in 32nm Thin-Body SOI Devices and SRAM Cells," Proc. ICSICT 2008: 2008.
  • U. Kovac, D. Reid, C. Millar, G. Roy, S. Roy and A. Asenov, "Statistical simulation of random dopant induced threshold voltage fluctuations for 35 nm channel length MOSFET," Microelectronics Reliability, Vol. 48, No. 8-9, pp. 1572–1575, 2008.
  • C. Millar, R. Madathil, O. Beckstein, M. S. P. Sansom, S. Roy and A. Asenov, "Brownian simulation of charge transport in α-Haemolysin," Journal of Computational Electronics, 2008.
  • C. Millar, S. Roy, D. Cumming, T. Drysdale, S. Furber, D. Edwards, M. Zwolinski, A. Tyrrell, A. Murray, S. Pickles, R. O. Sinnott, D. Berry and A. Asenov, "Meeting the Design Challenges of Nano-CMOS Electronics," in Proc. Workshop on the Impact of Process Variability on Design and Test, Mar. 2008,
  • C. Millar, S. Roy, D. R. S. Cumming, T. D. Drysdale, S. Furber, D. Edwards, M. Zwolinski, A. M. Tyrrell, A. F. Murray, S. Pickles, R. O. Sinnott, D. Berry and A. Asenov, "Meeting the Design Challenges of nano-CMOS Electronics," Design Automation and Test in Europe: Workshop W2, Impact of Process Variability on Design and Test: Mar. 10-14, 2008.
  • C. Millar, D. Reid, G. Roy, S. Roy and A. Asenov, "Accurate Statistical Description of Random Dopant Induced Threshold Voltage Variability," IEEE Electron Device Letters, Vol. 29, No. 8, pp. 946–948, Aug. 2008.
  • D. Reid, C. Millar, S. Roy, G. Roy, R. O. Sinnott, G. Stewart, G. Stewart and A. Asenov, "An Accurate Statistical Analysis of Random Dopant Induced Variability in 140,000 13nm MOSFETs," Silicon Nanoelectronics Workshop 2008: June 15-16, 2008.
  • D. Reid, C. Millar, S. Roy, R. O. Sinnott, G. Stewart, G. Stewart and A. Asenov, "Prediction of Random Dopant Induced Threshold Voltage Fluctuations in NanoCMOS Transistors," Simulation of Semiconductor Processes and Devices 2008: Sept. 9-11, 2008.
  • D. Reid, S. Roy, C. Millar, G. Roy, R. O. Sinnott, G. Stewart and A. Asenov, "Supporting Statistical Semiconductor Analysis using EGEE and OMII-UK Middleware," EGEE 3rd User Forum: Feb. 2008.
  • D. Reid, C. Millar, A. Asenov, S. Roy, G. Roy, R. O. Sinnott and G. Stewart, "Supporting Statistical Semiconductor Device Analysis using EGEE and OMII-UK Middleware," EGEE User Conference: Clermont-Ferrand, France, Feb. 2008.
  • D. Reid, C. Millar, S. Roy, G. Roy, R. O. Sinnott, G. Stewart, G. Stewart and A. Asenov, "Enabling Cutting-Edge Semiconductor Simulation through Grid Technology," All Hands Meeting 2008: Sept. 2008.
  • S. Roy, C. Millar and A. Asenov, "Impact of Device Variability on Design," Ultimate Limits of Integration in Silicon 2008: Mar. 12-14, 2008.
  • S. Roy, C. Millar and A. Asenov, "Statistical Compact Modelling as a Tool in Understanding Circuit Variability," Design Automation and Test in Europe: Workshop W2, Impact of Process Variability on Design and Test: Mar. 10-14, 2008.
  • R. O. Sinnott, T. Doherty, D. Martin, C. Millar, G. Stewart and J. Watt, "Supporting Security-oriented, Collaborative nanoCMOS Electronics Research," in Proc. International Workshop on Computing Science, June 2008,
  • R. O. Sinnott, A. Asenov, C. Bayliss, C. Davenhall, T. Doherty, B. Harbulot, M. Jones, D. Martin, C. Millar, G. Roy, S. Roy, G. Stewart and J. Watt, "Integrating Security Solutions to Support nanoCMOS Electronics Research," IEEE International Symposium on Parallel and Distributed Processing Systems with Applications: Sydney, Australia, Dec. 2008.
  • R. O. Sinnott, A. Asenov, C. Millar, D. Berry, B. Harbulot, D. Reid, G. Roy, S. Roy and G. Stewart, "Meeting the Design Challenges of nanoCMOS Electronics through Secure, Large-scale Simulation and Data Management," EGEE User Conference: Istanbul Turkey, Oct. 2008.
  • R. O. Sinnott, C. Bayliss, C. Millar, G. Stewart, G. Roy, S. Roy, D. Reid, B. Harbulot, C. Davenhall, A. Asenov and J. Watt, "Secure, Performance-Oriented Data Management for nanoCMOS Electronics," in Proc. e-Science 2008 Conference, Indiana, USA,
  • R. O. Sinnott, A. Asenov and C. Millar, "Supercomputing at Work in the nanoCMOS Electronics Domain," ERCIM News, vol. 74, pp. 22–23, July 2008.

2007

  • A. Asenov, C. Millar, S. Roy, D. R. S. Cumming, R. O. Sinnott, G. Stewart, A. F. Murray, D. Berry, A. M. Tyrrell, J. Hilder, S. Furber, S. Pickles, M. McKeown, M. Zwolinski and D. De Roure, "Meeting the Design Challenges of nano-CMOS Electronics," Third International Nanotechnology Conference on Communication and Cooperation: Apr. 16-17, 2007.
  • L. Han, R. O. Sinnott, G. Stewart, A. Asenov, S. Roy, G. Roy, C. Millar and D. Berry, "Towards a Grid-Enabled Simulation Framework for Nano-CMOS Electronics," IEEE e-Science 2007 Conference: 2007.
  • A. Martinez, M. Bescond, J. R. Barker, A. Svizhenko, M. P. Anantram, C. Millar and A. Asenov, "A self-consistent full 3-D real-space NEGF simulator for studying nonperturbative effects in nano-MOSFETs," IEEE Transactions on Electron Devices, Vol. 54, No. 9, pp. 2213–2222, 2007.
  • C. Millar, S. Roy, A. R. Brown and A. Asenov, "Simulating the bio-nanoelectronic interface," Journal of Physics-Condensed Matter, Vol. 19, No. 21, 2007.
  • C. Millar, S. Roy, O. Beckstein, M. S. P. Sansom and A. Asenov, "Continuum versus particle simulation of model nano-pores," Journal of Computational Electronics, Vol. 6, pp. 367–371, 2007.
  • C. Millar, R. Madathil, O. Beckstein, M. S. P. Sansom, S. Roy and A. Asenov, "Brownian simulation of charge transport in alpha-haemolysin," 12th International Workshop on Computational Electronics: Oct. 8-10, 2007.
  • R. O. Sinnott, A. Asenov, A. R. Brown, C. Millar, S. Roy, G. Roy and G. Stewart, "Grid Infrastructures for the Electronics Domain: Requirements and Early Prototypes from an EPSRC Pilot Project," in Proc. UK e-Science All Hands Meeting, Nottingham, UK, 2007, pp. 509–516.

2006

  • C. Millar, S. Roy and A. Asenov, "Simulation of Bio-Nano-CMOS devices," ser. E-MRS IUMRS ICEM 2006, Nice, France, p. i.
  • C. Millar, S. Roy, O. Beckstein, M. S. P. Sansom and A. Asenov, "Continuum versus particle simulation of model nano-pores," ser. 11th International Workshop on Computational Electronics, IWCE 2006, Vienna, Austria, p. 367.
  • C. Millar, S. Roy, O. Beckstein, M. S. P. Sansom and A. Asenov, "Continuum Vs. Particle Simulations of Model Nano-Pores," J. Computational Electronics, 2006.
  • C. Millar, A. Asenov and S. Roy, "P3M Modelling of Biological Systems," in Proc. E-MRS IUMRS ICEM 2006 Spring Meeting, Symposium Q, July.
  • R. O. Sinnott, A. Asenov, D. Berry, S. Roy, S. Furber, D. R. S. Cumming, A. Tyrrell, A. F. Murray, M. Zwolinski, S. Pickles and C. Millar, "Meeting the Design Challenges of nanoCMOS Electronics: An Introduction to an EPSRC Pilot Project," in Proc. UK e-Science All Hands Meeting, Sept. 2006,

2005

  • C. Millar, A. Asenov and S. Roy, "Self-consistent particle simulation of ion channels," Journal of Computational and Theoretical Nanoscience, Vol. 2, No. 1, pp. 56–67, 2005.
  • C. Millar, A. Asenov, S. Roy and A. R. Brown, "Simulating the bio-nano-CMOS interface," ser. 5th IEEE conference on Nanotechnology, Nagoya, Japan,
  • C. Millar and A. Asenov, "P3M Simulation of Biological Ion Channels," in Handbook of Theoretical and Computational Nanotechnology. American Scientific Publishers, 2005,
  • C. Millar, A. Asenov, A. R. Brown and S. Roy, "Tracking the propagation of individual ions through nano-MOSFETs," J. Computational Electronics, Vol. 4, No. 1-2, pp. 185–188, Apr. 2005.
  • C. Millar, A. Asenov and S. Roy, "Simulating Ion Channels and their Nano-CMOS Interface," in Proc. U.K.-Korea Joint Symposium on Bio-Technology, Feb.

2004

  • C. Millar, A. Asenov, A. R. Brown and S. Roy, "Tracking the propagation of individual ions through ion channels with nano-MOSFETs," in Proc. 10th International Workshop on Computational Electronics (IWCE), ser. International workshop on Computational Electronics, IWCE-10, West Lafayette, IN, USA, Oct. 24-27, 2004, pp. 205–206.
  • C. Millar, "3D Simulation Techniques For Biological Ion Channels," thesis thesis, University of Glasgow, Glasgow, 2004.

2003

  • C. Millar, A. Asenov and S. Roy, "Brownian ionic channel simulation," in Proc. International Workshop on Computational Electronics, Champaign Urbana, USA,
  • C. Millar, A. Asenov and S. Roy, "Brownian dynamics based particle mesh simulation of ionic solutions and channels," ser. Proceedings Modeling and Simulation of Microsystems 2003 - MSM 03,
  • C. Millar, A. Asenov and S. Roy, "Brownian ionic channel simulation," Journal of Computational Electronics, Vol. 2, pp. 257–262, 2003.
  • C. Millar and A. Asenov, "Modelling Ion Channels: The Engineers Approach," in Proc. IOP Electrostatics 2003, Abstracts, Mar.
  • C. Millar, A. Asenov and S. Roy, "Brownian Dynamics Based Simulation Of Ionic Solutions And Channels," in Proc. Nanotech 2003: Technical Proceedings, Cambridge,

2002

  • C. Millar, A. Asenov and J. R. Watling, "Excessive Over-Relaxation Method For Multigrid Poisson Solvers," J. Computational Electronics, Vol. 1, No. 3, pp. 341–345, 2002.
  • C. Millar, A. Asenov and S. Roy, "A Generic Particle-Mesh Framework For The Simulation Of Ionic Channels," J. Computational Electronics, Vol. 1, No. 3, pp. 405–409, 2002.
  • C. Millar and A. Asenov, "Multiscale Particle-Mesh Ion Channel Simulations," in Proc. Workshop on Ion Channels,

2001

  • C. Millar, A. Asenov, S. Roy and J. M. Cooper, "Generic Particle-Mesh Framework for the Simulation of Ionic Channels," in Proc. Proceedings of the International Workshop on Computational Electronics IWCE01,