Biography

Professor Asen Asenov (FIEEE, FRSE) is a James Watt Professor in Electrical Engineering and the Leader of the 30 members strong Glasgow Device Modelling Group. He directs the development of 2D and 3D quantum mechanical, Monte Carlo and classical device simulators and their application in the design of advanced and novel CMOS devices and has more than 650 publications and more than 170 invited talks in the above areas.

Professor Asenov is a founder and CEO of Gold Standard Simulations (GSS) Ltd. GSS is the leader in physical simulation of statistical variability, statistical compact model extraction and generation technology and statistical circuit simulation. The GSS customers include leading foundries, IDMs, fables companies and design IP startups. He is also a Director of SureCore, Ltd, a Green SRAM design IP start-up company.

Professor Asenov received his MSc degree in solid-state physics from Sofia University, Bulgaria in 1979 and a PhD degree in physics from The Bulgarian Academy of Science in 1989. He has ten years of industrial experience as a head of the Process and Device Modelling Group in the Institute of Microelectronics, Sofia, leading in 1986 the development of one of the first integrated process and device CMOS simulators IMPEDANCE. In 1989–1991 he was a Visiting Professor at the Physics Department of The Technical University of Munich, Germany. He joined the Department of Electronics and Electrical Engineering at the University of Glasgow in 1991, and served as a Head of Department in 1999-2003.

He is a fellow of the Royal Academy of Scotland, an IEEE Fellow, a member of the IEEE Electron Device Society Technology Computer-Aided Design Committee and of the BP Fellowship Committee. He is co-author of European Nanoelectronics Advisory Council (ENIAC) Strategic Research Agenda (SRA) and the 2011 edition of the ITRS. He acted on behave of EC as and reviewer of more than 15 EC projects and as an evaluator of several FP5, FP6 and FP7 calls. He has been a general chair, co-chair and TPC chair for many international conferences and workshops.

Further information: http://www.gla.ac.uk/schools/engineering/staff/asenasenov

Publications

2014

  • F. Adamu-Lema, S. M. Amoroso, X. Wang, B. Cheng, L. Shifren, R. Aitken, S. Sinha, G. Yeric and A. Asenov, "The Discrepancy Between the Uniform and Variability Aware Atomistic TCAD Simulations of Decananometer Bulk MOSFETs and FinFETs," in Proc. 19th International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Yokohama Japan, Sept. 8-11, 2014, pp. 285–288.
  • S. M. Amoroso, V. P. Georgiev, E. Towie, C. Riddet and A. Asenov, "Metamorphosis of a nano wire: A 3-D coupled mode space NEGF study," Computational Electronics (IWCE), 2014 International Workshop on: June 2014.
  • S. M. Amoroso, V. P. Georgiev, L. Gerrer, E. Towie, X. Wang, C. Riddet, A. R. Brown and A. Asenov, "Inverse Scaling Trends for Charge-Trapping-Induced Degradation of FinFETs Performance," IEEE Trans. Electron Dev. No. 99, Oct. 2014.
  • A. Asenov, F. Adamu-Lema, X. Wang and S. M. Amoroso, "Problems with the continuous doping TCAD simulations of decananometer CMOS transistors," IEEE Transactions on Electron Devices, Vol. 61, No. 8, pp. 2745–2751, Aug. 2014.
  • A. Asenov, B. Cheng, F. Adamu-Lema, L. Shifren, S. Sinha, C. Riddet, C. L. Alexander, A. R. Brown, X. Wang and S. M. Amoroso, "Predictive Simulation of Future CMOS Technologies and Their Impact on Circuits," in Proc. IEEE 12th International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Guilin China, Oct. 28-31, 2014, pp. 1411–1414.
  • C. Busche, L. Vila-Nadal, J. Yan, H. N. Miras, D.-L. Long, V. P. Georgiev, A. Asenov, R. H. Pedersen, N. Gadegaard, M. Mirza, D. J. Paul, J. M. Poblet and L. Cronin, "Design and fabrication of memory devices based on nanoscale polyoxometalate clusters," Nature, Nov. 2014.
  • V. P. Georgiev, S. Markov, L. Vila-Nadal, C. Busche, L. Cronin and A. Asenov, "Optimization and Evaluation of Variability in the Programming Window of a Flash Cell With Molecular Metal-Oxide Storage," IEEE Trans. Electron Devices, Vol. 61, No. 6, pp. 2019–2026, Apr. 2014.
  • J. Lorenz, E. Baer, A. Burenkov, P. Evanschitzky, A. Asenov, L. Wang, X. Wang, A. R. Brown, C. Millar and D. Reid, "Simultaneous Simulation of Systematic and Stochastic Process Variations," in Proc. 19th International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Yokohama Japan, Sept. 8-11, 2014, pp. 289–292.
  • C. Sampedro, L. Donetti, F. Gámiz, A. Godoy, J. F. Garcia-Ruiz, G, S. M. Amoroso, C. Riddet, E. Towie and A. Asenov, "3D Multi-Subband Ensemble Monte Carlo Simulator of FinFETs and Nanowire Transistors," Simulation of Semiconductor Processes and Devices (SISPAD), 2014.
  • L. Wang, A. R. Brown, C. Millar, A. Burenkov, X. Wang, A. Asenov and J. Lorenz, "Simulation for statistical variability in realistic 20nm MOSFET," in Proc. 15th International conference on Ultimate Integration on Silicon (ULIS), Stockholm, Sweden, Apr. 7-9, 2014, pp. 5–9.
  • X. Wang, A. R. Brown, B. Cheng, S. Roy and A. Asenov, "Drain Bias Effects on Statistical Variability and Reliability and Related Subthreshold Variability in 20-nm Bulk Planar MOSFETs," Solid-State Electronics, Vol. 98, pp. 99–105, Aug. 2014.
  • X. Wang, D. Reid, L. Wang, A. Burenkov, C. Millar, B. Cheng, A. Lange, J. Lorenz, E. Baer and A. Asenov, "Variability-Aware Compact Model Strategy for 20-nm Bulk MOSFETs," in Proc. 19th International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Yokohama Japan, Sept. 8-11, 2014, pp. 293–296.
  • X. Wang, B. Cheng, A. R. Brown, C. Millar and A. Asenov, "Accurate Simulations of the Interplay Between Process and Statistical Variability for nanoscale FinFET-based SRAM Cell Stability," in Proc. 44th European Solid-State Device Research Conference (ESSDERC), Venice Italy, Sept. 22-26, 2014, pp. 349–352.
  • X. Wang, B. Cheng, C. Millar, D. Reid and A. Asenov, "Statistical aspects of FinFET based SRAM metrics subject to process and statistical variability," in Proc. IEEE 12th International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Guilin China, Oct. 28-31, 2014, pp. 702–704.

2013

  • F. Adamu-Lema, C. M. C. M. Compagnoni, S. M. Amoroso, N. Castellani, S. Markov, L. Gerrer, A. S. A. S. Spinelli, A. L. A. L. Lacaita and A. Asenov, "Accuracy and issues of the spectroscopic analysis of RTN traps in nanoscale MOSFETs," IEEE Trans. Electron Devices, Vol. 60, No. 2, pp. 833–839, Feb. 2013.
  • S. M. Amoroso, L. Gerrer, S. Markov, F. Adamu-Lema and A. Asenov, "RTN and BTI in Nanoscale MOSFETs: A Comprehensive Statistical Simulation Study," Solid State Electronics, Mar. 2013.
  • S. M. Amoroso, C. M. C. M. Compagnoni, A. Ghetti, L. Gerrer, A. S. A. S. Spinelli, A. L. A. L. Lacaita and A. Asenov, "Investigation of the RTN distribution of nanoscale MOS devices from subthreshold to on-state," Electron Device Letters, Vol. PP, No. 99, pp. 1–3, Apr. 2013.
  • A. Asenov, B. Cheng, A. R. Brown and X. Wang, "Chapter 15 Impact of Statistical Variability on FinFET Technology: From Device, Statistical Compact Modelling to Statistical Circuit Simulation," in Nyquist AD Converters, Sensor Interfaces, and Robustness, A. H. M. van Roermund, A. Baschirotto and M. Steyaert, Eds. New York: Springer, 2013, pp. 281–291.
  • A. Asenov, B. Cheng, X. Wang, A. R. Brown, D. Reid, C. Millar and C. L. Alexander, "Simulation Based Transistor-SRAM Co-Design in the Presence of Statistical Variability and Reliability," in Proc. IEEE International Electron Devices Meeting (IEDM), Washington DC, Dec. 9-11, 2013, pp. 818–821.
  • B. Cheng, X. Wang, A. R. Brown, J. B. Kuang, D. Reid, C. Millar, S. Nassif and A. Asenov, "SRAM Device and Cell Co-Design Considerations in a 14nm SOI FinFET Technology," in Proc. IEEE International Symposium on Circuits and Systems (ISCAS), Beijing China, May 19-23, 2013, pp. 2339–2342.
  • V. P. Georgiev, E. Towie and A. Asenov, "Impact of Precisely Positioned Dopants on the Performance of an Ultimate Silicon Nanowire Transistor: A Full Three-Dimensional NEGF Simulation Study," IEEE Transactions on Electron Devices, Vol. 60, No. 3, pp. 965–971, Mar. 2013.
  • V. P. Georgiev, E. Towie and A. Asenov, "Interactions between precisely placed dopants and interface roughness in silicon nanowire transistors: Full 3-D NEGF simulation study," Simulation of Semiconductor Processes and Devices (SISPAD), 2013 International Conference on: Glasgow, Sept. 3-5, 2013.
  • V. P. Georgiev and A. Asenov, Eds., Simulation of a single dopant nanowire transistor, 2013, MRS Spring Meeting, 2013.
  • S.-Y. Liao, E. Towie, D. Balaz, C. Riddet, B. Cheng and A. Asenov, "Impact of the statistical variability on 15nm IIIV and Ge MOSFET based SRAM design," 14th Ultimate Integration on Silicon (ULIS): Coventry, UK, Mar. 19-21, 2013.
  • S.-Y. Liao, E. Towie, D. Balaz, C. Riddet, B. Cheng and A. Asenov, "PDK development for 10nm III-V/Ge IFQW CMOS technology including statistical variability," Simulation of Semiconductor Processes and Devices (SISPAD), 2013 International Conference on: Glasgow, Scotland, Sept. 3-5, 2013.
  • C. Riddet, E. Towie and A. Asenov, "Performance evaluation of p-channel FinFETs using 3D ensemble Monte Carlo simulation," Simulation of Semiconductor Processes and Devices (SISPAD), 2013 International Conference on: Glasgow, Sept. 3-5, 2013.
  • E. Towie, C. Riddet and A. Asenov, "Monte Carlo Simulation of the Effect of Interface Roughness in Implant-Free Quantum-Well MOSFETs," 14th Ultimate Integration on Silicon (ULIS): Coventry, UK, Mar. 19-21, 2013.
  • E. Towie, C. Riddet and A. Asenov, "3D Monte Carlo Simulation of III-V Implant-Free Quantum-Well and FinFET MOSFETs," 14th International Workshop on Computational Electronics (IWCE): June 4-7, 2013.
  • E. Towie, C. Riddet and A. Asenov, "Comparison of raised source/drain Implant-Free Quantum-Well and Tri-gate MOSFETs using 3D Monte Carlo simulation," Simulation of Semiconductor Processes and Devices (SISPAD), 2013 International Conference on: Glasgow, Sept. 3-5, 2013.
  • L. Vilà‐Nadal, S. G. Mitchell, S. Markov, C. Busche, V. P. Georgiev, A. Asenov and L. Cronin, "Towards Polyoxometalate‐Cluster‐Based Nano‐Electronics," Chemistry-A European Journal, Vol. 19, No. 49, pp. 16502–16511, Dec. 2013.
  • X. Wang, A. R. Brown, B. Cheng and A. Asenov, "Drain Bias Impact on Statistical Variability and Reliability in 20 nm Bulk CMOS Technology," in Proc. 14th Ultimate Integration on Silicon (ULIS), U.K. Mar. 19-21, 2013, pp. 65–68.
  • X. Wang, F. Adamu-Lema, B. Cheng and A. Asenov, "Geometry, Temperature, and Body Bias Dependence of Statistical Variability in 20-nm Bulk CMOS Technology: A Comprehensive Simulation Analysis," IEEE Trans. Electron Devices, Vol. 60, No. 5, pp. 1547–1554, May 2013.
  • X. Wang, B. Cheng, A. R. Brown, C. Millar, J. B. Kuang, S. Nassif and A. Asenov, "Interplay Between Process-Induced and Statistical Variability in 14-nm CMOS Technology Double-Gate SOI FinFETs," IEEE Transactions on Electron Devices, Vol. 60, No. 8, pp. 2485–2492, Aug. 2013.
  • X. Wang, B. Cheng, A. R. Brown, C. Millar, C. L. Alexander, D. Reid, J. B. Kuang, S. Nassif and A. Asenov, "Unified Compact Modelling Strategies for Process and Statistical Variability in 14-nm node DG FinFETs," in Proc. 18th International Conference on Simulation of Semiconductor Processes and Devices, Glasgow Scotland UK, Sept. 3-5, 2013, pp. 139–142.
  • X. Wang, B. Cheng, A. R. Brown, C. Millar, J. B. Kuang, S. Nassif and A. Asenov, "Impact of Statistical Variability and Charge Trapping on 14 nm SOI FinFET SRAM Cell Stability," in Proc. 43rd European Solid-State Device Research Conference (ESSDERC), Bucharest Romania, Sept. 16-20, 2013, pp. 234–237.
  • X. Wang, B. Cheng, A. R. Brown, C. Millar, J. B. Kuang, S. Nassif and A. Asenov, "Statistical Variability and Reliability and the Impact on Corresponding 6T-SRAM Cell Design for a 14-nm Node SOI FinFET Technology," IEEE Design & Test, Vol. 30, No. 6, pp. 18–28, Dec. 2013.

2012

  • F. Adamu-Lema, S. M. Amoroso, S. Markov, L. Gerrer and A. Asenov, "A Unified Computational Scheme for 3D Statistical Simulation of Reliability Degradation of Nanoscale MOSFETs," 17th International Conference on Simulation of Semiconductor Processes and Devices (SISPAD): Sept. 5-7, 2012.
  • S. M. Amoroso, L. Gerrer, S. Markov, F. Adamu-Lema and A. Asenov, "Comprehensive Statistical Comparison of RTN and BTI in Deeply Scaled MOSFETs by means of 3D ‘Atomistic’ Simulation," 42nd European Solid-State Device Research Conference (ESSDERC): Sept. 17-21, 2012.
  • S. M. Amoroso, F. Adamu-Lema, S. Markov, L. Gerrer and A. Asenov, "3D Dynamic RTN Simulation of a 25nm MOSFET: The Importance of Variability in Reliability Evaluation of Decananometer Devices," 15th International Workshop on Computational Electronics (IWCE): 2012.
  • K. H. Chan, C. Riddet, J. R. Watling and A. Asenov, "Monte Carlo Simulations of Ge Implant Free Quantum Well FETs - The Role of Substrate and Channel Orientation," 2012 International Silicon-Germanium Technology and Device Meeting (ISTDM): June 4-6, 2012.
  • B. Cheng, A. R. Brown, X. Wang and A. Asenov, "Statistical Variability Study of a 10nm Gate Length SOI FinFET Device," in Proc. IEEE Silicon Nanoelectronics Workshop, Honolulu HI USA, June 10-11, 2012, pp. 69–70.
  • B. Cheng, X. Wang, A. R. Brown, C. Millar, A. Asenov, J. B. Kuang and S. Nassif, "Statistical TCAD Based PDK Development for a FinFET Technology at 14nm Technology node," in Proc. 17th International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Denver CO USA, Sept. 5-7, 2012, pp. 113–116.
  • J. Ding, P. Asenov, D. Reid, C. Millar and A. Asenov, "Statistical compact model extraction in the presence of BTI degradation," VARI 2012: June 11-12, 2012.
  • L. Gerrer, S. Markov, S. M. Amoroso, F. Adamu-Lema and A. Asenov, "Impact of random dopant fluctuations on trap-assisted tunnelling in nanoscale MOSFETs," Journal of Microelectronics Reliability, July 2012.
  • S. Markov, B. Cheng and A. Asenov, "Statistical Variability in Fully Depleted SOI MOSFETs Due to Random Dopant Fluctuations in the Source and Drain Extensions," IEEE Electron Device Letters, Vol. 3, No. 3, pp. 315–317, 2012.
  • S. Markov, L. Gerrer, S. M. Amoroso, F. Adamu-Lema and A. Asenov, "Time Domain Simulation of Statistical Variability and Oxide Degradation Including Trapping/detrapping Dynamics," 17th International Conference on Simulation of Semiconductor Processes and Devices (SISPAD): Sept. 5-7, 2012.
  • A. S. Mohd Zain, S. Markov, B. Cheng, X. Wang and A. Asenov, "Comprehensive Study of the Statistical Variability in a 22nm Fully-Depleted Ultra-Thin-Body SOI MOSFET," EuroSOI 2012 Conference: Jan. 23-25, 2012.
  • C. Riddet, J. R. Watling, K. Chan, E. H. C. Parker, T. E. Whall, D. R. Leadley and A. Asenov, "Hole Mobility in Germanium as a Function of Substrate and Channel Orientation, Strain, Doping, and Temperature," IEEE Transactions on Electron Devices, Vol. 59, No. 7, pp. 1878–1884, July 2012.
  • T. B. Tang, A. Murray, B. Cheng and A. Asenov, Eds., A framework to study time-dependent variability in circuits at sub-35nm technology nodes, 2012.
  • E. Towie, S.-Y. Liao, C. Riddet and A. Asenov, "InGaAs Implant-Free Quantum-Well MOSFETs - Performance Evaluation Using 3D Monte Carlo Simulation," Intel European Research and Innovation Conference: Dublin, Ireland, Oct. 3-4, 2012.
  • X. Wang, G. Roy, O. Saxod, A. Bajolet, A. Juge and A. Asenov, "Simulation Study of Dominant Statistical Variability Sources in 32-nm High-κ/Metal Gate CMOS," IEEE Electron Device Letters, Vol. 33, No. 5, pp. 643–645, May 2012.
  • X. Wang, A. R. Brown, B. Cheng and A. Asenov, "Statistical distribution of RTS amplitudes in 20nm SOI FinFETs," in Proc. IEEE Silicon Nanoelectronics Workshop, Honolulu HI USA, June 10-11, 2012, pp. 77–78.
  • X. Wang, A. R. Brown, B. Cheng and A. Asenov, "RTS Amplitude Distribution in 20nm SOI FinFETs subject to Statistical Variability," in Proc. 17th International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Denver CO USA, Sept. 5-7, 2012, pp. 296–299.
  • X. Wang, B. Cheng, A. R. Brown, C. Millar and A. Asenov, "Statistical Variability in 14-nm node SOI FinFETs and its Impact on Corresponding 6T-SRAM Cell Design," in Proc. 42nd European Solid-State Device Research Conference (ESSDERC), Bordeaux France, Sept. 17-21, 2012, pp. 113–116.
  • J. R. Watling, C. Riddet and A. Asenov, "Accurate and efficient modelling of inelastic hole-acoustic phonon scattering in Monte Carlo simulations," 15th International Workshop on Computational Electronics (IWCE): May 22-25, 2012.

2011

  • A. Asenov, A. R. Brown and B. Cheng, "Statistical aspects of NBTI/PBTI and impact on SRAM yield," in Proc. Design, Automation and Test in Europe, Grenoble, France, Mar. 14-18, 2011,
  • N. Aymerich, A. Asenov, A. R. Brown, R. Canal, B. Cheng, J. Figueras, A. Gonzalez, E. Herrero, S. Markov, M. Miranda, P. Pouyan, T. Ramirez, A. Rubio, I. Vatajelu, X. Vera, X. Wang and P. Zuber, "New Reliability Mechanisms in Memory Design for sub-22nm Technologies," in Proc. IEEE 17th International On-Line Testing Symposium, Athens, Greece, July 13-15, 2011, pp. 111–114.
  • B. Benbakhti, K. Kalna, K. H. Chan, E. Towie, G. Hellings, G. Eneman, K. De Meyer, M. Meuris and A. Asenov, "Design and analysis of the In0.53Ga0.47As implant-free quantum-well device structure," Microelectronic Engineering, Vol. 88, No. 4, pp. 358–361,
  • B. Benbakhti, K. Chan, E. Towie, K. Kalna, C. Riddet, X. Wang, G. Eneman, G. Hellings, K. De Meyer, M. Meuris and A. Asenov, "Numerical analysis of the new Implant-Free Quantum-Well CMOS: DualLogic approach," Solid-State Electronics, Vol. 63, No. 1, pp. 14–18, Sept. 2011.
  • R. Canal, A. Rubio, A. Asenov, A. R. Brown, M. Miranda, P. Zuber, A. Gonzalez and X. Vera, "TRAMS Project: Variability and Reliability of SRAM Memories in sub-22 nm Bulk-CMOS Technologies," Procedia Computer Science, Vol. 7, pp. 148–149, 2011.
  • K. Chan, C. Riddet, J. R. Watling and A. Asenov, "Monte Carlo Simulation of a 20nm Gate Length Implant Free Quantum Well Ge p-MOSFET with different Lateral Spacer Width," 12th Ultimate Integration on Silicon: Cork, Ireland, Mar. 14-16, 2011.
  • B. Cheng, A. R. Brown, X. Wang and A. Asenov, "Statistical Variability Study of Extreme-Scaled SOI FinFet Device," Intel European Research and Innovation Conference: Oct. 12-14, 2011.
  • B. Cheng, A. R. Brown and A. Asenov, "Impact of NBTI/PBTI on SRAM Stability Degradation," IEEE Electron Device Letters, Vol. 32, No. 6, pp. 740–742, 2011.
  • N. M. Idris, B. Cheng, A. R. Brown, S. Markov and A. Asenov, "Comprehensive Simulation Study of Statistical Variability in 32nm SOI MOSFET," in Proc. 7th Workshop of the Thematic Network on Silicon on Insulator technology, devices and circuits, Jan. 17-19, 2011,
  • A. Lange, C. Sohrmann, R. Jancke, J. Haase, B. Cheng, U. Kovac and A. Asenov, Eds., A general approach for multivariate statistical MOSFET compact modelling preserving correlations, 2011,
  • S. Markov, X. Wang, N. Moezi and A. Asenov, "Drain Current Collapse in Nanoscaled Bulk MOSFETs Due to Random Dopant Compensation in the Source/Drain Extensions," Electron Devices, IEEE Transactions on, Vol. 58, No. 8, pp. 2385–2393, Aug. 2011.
  • S. Markov, N. M. Idris and A. Asenov, "Statistical variability in n-channel UTB-FD-SOI MOSFETs under the influence of RDF, LER, MGG and PBTI," in Proc. SOI Conference (SOI), 2011 IEEE International, Oct. 3-6, 2011,
  • A. Martinez, A. R. Brown, S. Roy and A. Asenov, "NEGF simulations of a junctionless Si gate-all-around nanowire transistor with discrete dopants," in Proc. Ultimate Integration on Silicon, Cork, Ireland, Mar. 14-16, 2011,
  • A. Martinez, N. Seoane, M. Aldegunde, A. R. Brown and A. Asenov, "The Role of Discrete Dopants in the Statistical Variability of Narrow Gate-All-Around Silicon Nanowire Transistors," IEEE Transactions on Electron Devices, Vol. 58, No. 8, pp. 2209–2217, Aug. 2011.
  • A. S. Mohd Zain, B. Cheng, X. Wang and A. Asenov, "Insights on Device Performance of SOI MOSFET with 60 nm and 15 nm BOX Thickness," EuroSOI 2011 Conference: Jan. 17-19, 2011.
  • C. Riddet, C. L. Alexander, A. R. Brown, S. Roy and A. Asenov, "Simulation of "Ab Initio" Quantum Confinement Scattering in UTB MOSFETs Using Three-Dimensional Ensemble Monte Carlo," IEEE Transactions on Electron Devices, Vol. 58, No. 3, pp. 600–608, Mar. 2011.
  • C. Riddet, K. Chan and A. Asenov, "Monte Carlo study of the impact of strain and orientation on hole transport in germanium and silicon," UK Semiconductors: July 6-7, 2011.
  • C. Riddet, K. Chan and A. Asenov, "Full-band Monte Carlo Simulations of Hole Transport in Germanium: from bulk material to devices," 17th International Conference on Electron Dynamics in Semiconductors, Optoelectronics and Nanostructures: Aug. 7-12, 2011.
  • E. Towie, K. Chan, B. Benbakhti, C. Riddet and A. Asenov, "Statistical Variability in Implant-Free Quantum-Well MOSFETs with InGaAs and Ge: A comparative 3D simulation study," Intel European Research and Innovation Conference: Oct. 12-14, 2011.
  • E. Towie, K. Chan, C. Riddet and A. Asenov, "High Mobility Channel MOSFETs for CMOS: A Comparative Implant-Free Quantum-Well 3D Statistical Variability Study," European Workshop on Heterostructure Technology: Nov. 7-9, 2011.
  • X. Wang, S. Markov and A. Asenov, "Channel-length dependence of statistical threshold-voltage variability in extremely scaled HKMG MOSFETs," in Proc. 12th Ultimate Integration on Silicon, Cork, Ireland, Mar. 14-16, 2011, pp. 175–178.
  • X. Wang, S. Roy, A. R. Brown and A. Asenov, "Impact of STI on Statistical Variability and Reliability of Decananometer MOSFETs," IEEE Electron Device Letters, Vol. 32, No. 4, pp. 479–481, Apr. 2011.
  • X. Wang, A. R. Brown, N. M. Idris, S. Markov, G. Roy and A. Asenov, "Statistical Threshold-Voltage Variability in Scaled Decananometer Bulk HKMG MOSFETs: A Full-Scale 3-D Simulation Scaling Study," IEEE Transactions on Electron Devices, Vol. 58, No. 8, pp. 2293–2301, Aug. 2011.
  • X. Wang, A. R. Brown, B. Cheng and A. Asenov, "Statistical Variability and Reliability in Nanoscale FinFETs," in Proc. IEEE International Electron Devices Meeting (IEDM), Washington DC, Dec. 5-7, 2011, pp. 103–106.
  • J. R. Watling, C. Riddet, KH. Chan and A. Asenov, "Simulation of hole-mobility in doped relaxed and strained Ge," Microelectronic Engineering, Vol. 88, No. 4, pp. 462–464, Apr. 2011.

2010

  • C. L. Alexander and A. Asenov, Eds., 'ab initio' Surface Roughness Scattering in 3D Monte Carlo Transport Simulations, 2010,
  • A. Asenov, B. Cheng, D. Dideban, U. Kovac, N. Moezi, C. Millar, G. Roy, A. R. Brown and S. Roy, "Modeling and Simulation of Transistor and Circuit Variability and Reliability," Custom Integrated Circuit Conference: San Jose, California, Sept. 19-22, 2010.
  • P. Asenov, N. A. Kamsani, D. Reid, C. Millar, S. Roy and A. Asenov, "Combining Process and Statistical Variability in the Evaluation of the Effectiveness of Corners in Digital Circuit Parametric Yield Analysis," European Solid-State Circuits Conference: Sept. 13-17, 2010.
  • P. Asenov, D. Reid, C. Millar, S. Roy, Z. Liu, S. Furber and A. Asenov, "Generic Aspects of Digital Circuit Behaviour in the Presence of Statistical Variability," European Workshop on CMOS Variability: May 26, 2010.
  • B. Benbakhti, J. S. Ayubi-Moak, K. Kalna, D. Lin, G. Hellings, G. Brammertz, K. De Meyer, I. Thayne and A. Asenov, "Impact of Interface State Trap Density on the Performance Characteristics of Different III-V MOSFET Architectures," Journal of Microelectronics Reliability, Vol. 50, No. 3, pp. 360–364, 2010.
  • B. Benbakhti, E. Towie, K. Kalna, G. Heltlings, G. Eneman, K. De Meyer, M. Meuris and A. Asenov, "Monte Carlo Analysis of In0.53Ga0.47As Implant-Free Quantum-Well Device Performance," Silicon Nanoelectronics Workshop: Honolulu, USA, June 13-14, 2010.
  • B. Benbakhti, K. Kalna, K. Chan, G. Hellings, G. Eneman, K. De Meyer, M. Meuris and A. Asenov, "Design and Analysis of a New In53Ga47As Implant-Free Quantum-Well Device Structure," European Materials Research Society: Strasbourg, France, June 7-11, 2010.
  • B. Benbakhti, K. Kalna, X. Wang, B. Cheng and A. Asenov, "Impact of Raised Source/Drain in the In0.53Ga0.47As Channel Implant-Free Quantum-Well Transistor," in Proc. Ultimate Integration on Silicon, U.K, Mar. 2010, pp. 129–132.
  • B. Bindu, B. Cheng, G. Roy, X. Wang, S. Roy and A. Asenov, "Parameter set and data sampling strategy for accurate yet efficient statistical MOSFET compact model extraction," Solid-State Electronics, Vol. 54, No. 3, pp. 307–315, Mar. 2010.
  • A. R. Brown, V. Huard and A. Asenov, "Statistical Simulation of Progressive NBTI Degradation in a 45-nm Technology pMOSFET," IEEE Transactions on Electron Devices, Vol. 57, No. 9, pp. 2320–2323, 2010.
  • A. R. Brown, N. M. Idris, J. R. Watling and A. Asenov, "Impact of Metal Gate Granularity on Threshold Voltage Variability: A Full-Scale Three-Dimensional Statistical Simulation Study," IEEE Electron Device Letters, Vol. 31, No. 11, pp. 1199–1201, Nov. 2010.
  • A. R. Brown, J. R. Watling, G. Roy, C. Riddet, C. L. Alexander, U. Kovac, A. Martinez and A. Asenov, "Use of density gradient quantum corrections in the simulation of statistical variability in MOSFETs," Journal of Computational Electronics, Vol. 9, No. 3-4, pp. 187–196, 2010.
  • A. R. Brown, X. Wang, S. Markov, B. Cheng and A. Asenov, "Simulation of statistical variability in 18 and 13nm bulk MOSFETs," Intel European Research and Innovation Conference: Oct. 12-14, 2010.
  • M. Faiz. Bukhori, S. Roy and A. Asenov, "Simulation of Statistical Aspects of Charge Trapping and Related Degradation in Bulk MOSFETs in the Presence of Random Discrete Dopants," IEEE Trans. Electron Dev. Vol. 57, No. 4, pp. 795–803, Apr. 2010.
  • K. Chan, B. Benbakhti, C. Riddet, J. R. Watling and A. Asenov, "Simulation study of the 20 nm gate-length Ge implant-free quantum well p-MOSFET," Microelectronic Engineering, Vol. 88, No. 4, pp. 362–365, Oct. 2010.
  • K. Chan, B. Benbakhti, C. Riddet, J. R. Watling and A. Asenov, "Simulation study of the 20 nm gate-length Ge implant-free quantum well p-MOSFET," European Materials Research Society: Strabourg, France, June 7-11, 2010.
  • B. Cheng, D. Dideban, N. Moezi, C. Millar, G. Roy, X. Wang, S. Roy and A. Asenov, "Statistical Variability Compact Modeling Strategies for BSIM4 and PSP," IEEE Design and Test of Computers, Vol. 27, No. 2, pp. 26–35, Mar./Apr. 2010.
  • B. Cheng, D. Dideban, N. Moezi, C. Millar, G. Roy, X. Wang, S. Roy and A. Asenov, "Capturing Intrinsic Parameter Fluctuations using the PSP Compact Model," in Proc. Design, Automation and Test in Europe, Dresden, Germany, Mar. 8-12, 2010, pp. 650–653.
  • B. Cheng, N. Moezi, D. Dideban, C. Millar, S. Roy and A. Asenov, "Impact of Statistical Parameter Set Selection on Accuracy of Statistical Compact Modeling," MOS-AK Workshop: Sapienza Università di Roma, Apr. 8-9, 2010.
  • B. Cheng, A. R. Brown, S. Roy and A. Asenov, "PBTI/NBTI-Related Variability in TB-SOI and DG MOSFETs," IEEE Electron Device Letters, Vol. 31, No. 5, pp. 408–410, May 2010.
  • D. Dideban, B. Cheng, N. Moezi, N. A. Kamsani, C. Millar, S. Roy and A. Asenov, "Impact of Input Slew Rate on Statistical Timing and Power Dissipation Variability in nano CMOS," in Proc. Ultimate Integration on Silicon, Glasgow, Scotland, UK, Mar. 17-19, 2010, pp. 45–48.
  • D. Dideban, B. Cheng, N. Moezi, X. Wang and A. Asenov, "Evaluation of 35nm MOSFET Capacitance Components in PSP Compact Model," ICEE2010: Isfahan, Iran, May 11-13, 2010.
  • N. M. Idris, A. R. Brown, J. R. Watling and A. Asenov, "Simulation Study of Workfunction Variability in MOSFETs with Polycrystalline Metal Gates," in Proc. Ultimate Integration on Silicon, Glasgow, Scotland, Mar. 18-19, 2010, pp. 165–168.
  • N. A. Kamsani, B. Cheng, C. Millar, N. Moezi, X. Wang, S. Roy and A. Asenov, "Impact of Slew Rate Definition on the Accuracy of nanoCMOS Inverter Timing Simulations," in Proc. Ultimate Integration on Silicon, Glasgow, Scotland, UK, Mar. 17-19, 2010,
  • U. Kovac, D. Dideban, B. Cheng, N. Moezi, G. Roy and A. Asenov, "A Novel Approach to the Statistical Generation of Non-normal Distributed PSP Compact Model Parameters using a Nonlinear Power Method," in Proc. Simulation of Semiconductor Processes and Devices (SISPAD), Bologna, Italy, Sept. 6-8, 2010, pp. 125–128.
  • U. Kovac, C. L. Alexander, G. Roy, C. Riddet, B. Cheng and A. Asenov, "Hierarchical Simulation of Statistical Variability: From 3-D MC with ‘ab initio’ Ionized Impurity Scattering to Statistical Compact Models," IEEE Transactions on Electron Devices, 2010.
  • N. M.Idris, A. R.Brown, J. R.Watling and A. Asenov, "Simulation Study of Workfunction variability in MOSFETs with Polycrytalline Metal gates," ULIS 2010: University of Glasgow, Scotland UK, Mar. 18-19, 2010.
  • S. Markov, S. Roy and A. Asenov, "Direct Tunnelling Gate Leakage Variability in Nano-CMOS Transistors," Electron Devices, IEEE Transactions on, Vol. 57, No. 11, pp. 3106–3114, Nov. 2010.
  • S. Markov, P. V. Sushko, C. Fiegna, E. Sangiorgi, A. Shluger and A. Asenov, "From ab initio properties of the Si-SiO2 interface, to electrical characteristics of metal-oxide-semiconductor devices," Journal of Physics: Conference Series, Vol. 242, No. 1, p. 012010, Jan. 2010.
  • A. Martinez, B. Benbakhti and A. Asenov, "Effect of the Channel Thickness on the Performance of the Implant-Free Quantum-Well MOSFET," International Workshop on Computational Electronics: Pisa, Italy, Oct. 27-29, 2010.
  • I. Moore, C. Millar, S. Roy and A. Asenov, Eds., Integrating drift-diffusion and Brownian simulations for sensory applications, 2010, Ultimate Integration on Silicon, Mar. 17-19, 2010.
  • D. Reid, C. Millar, S. Roy and A. Asenov, "Understanding LER-Induced MOSFET VT Variability—Part I: Three-Dimensional Simulation of Large Statistical Samples," IEEE Transactions on Electron Devices, Nov. 2010.
  • D. Reid, C. Millar, S. Roy and A. Asenov, "Understanding LER-Induced MOSFET VT Variability—Part II: Reconstructing the Distribution," IEEE Transactions on Electron Devices, Nov. 2010.
  • C. Riddet, J. R. Watling, K. Chan and A. Asenov, "Monte Carlo simulation study of the impact of strain and substrate orientation on hole mobility in Germanium," in Proc. 2nd Workshop on Theory, Modelling and Computational Methods for Semiconductor Materials and Nanostructures, York, UK, Jan. 13-15, 2010, p. 17.
  • C. Riddet, J. R. Watling, K. Chan and A. Asenov, "Monte Carlo simulation study of the impact of strain and substrate orientation on hole mobility in Germanium," Journal of Physics Conferences Series, Vol. 242, p. 012017, 2010.
  • C. Riddet, J. R. Watling, K. Chan, A. Asenov, B. De Jaeger, J. Mitard and M. Meuris, "Monte Carlo Simulation Study of Hole Mobility in Germanium MOS Inversion Layers," in Proc. 14th International Workshop on Computational Electronics (IWCE), Oct. 27-29, 2010, pp. 239–242.
  • R. O. Sinnott, G. Stewart, A. Asenov, C. Millar, D. Reid, G. Roy, S. Roy, C. Davenhall, B. Harbulot and M. Jones, "E-Infrastructure Support for nanoCMOS Device and Circuit Simulations," Parallel and Distributed Computing and Networks: Feb. 16-18, 2010.
  • T. B. Tang, A. F. Murray, B. Cheng and A. Asenov, "Statistical NBTI-Effect Prediction for ULSI Circuits," 10th ULIS: 2010.
  • J. R. Watling, C. Riddet, KH. Chan and A. Asenov, "Simulation of hole-mobility in doped relaxed and strained Ge layers," Journal of Applied Physics, Vol. 108, p. 093715, 2010.

2009

  • A. Asenov, A. R. Brown, G. Roy, B. Cheng, C. L. Alexander, C. Riddet, U. Kovac, A. Martinez, N. Seoane and S. Roy, "Simulation of statistical variability in nano-CMOS transistors using drift-diffusion, Monte Carlo and non-equilibrium Green’s function techniques," Journal of Computational Electronics, Vol. 8, No. 3-4, pp. 349–373, 2009.
  • J. Ayubi-Moak, B. Benbakhti, K. Kalna, G. W. Paterson, R. Hill, M. Passlack, I. Thayne and A. Asenov, "Effect of Interface State Trap Density on the Characteristics of n-type, Enhancement- Mode, Implant-Free In0.3Ga0.7As MOSFETs," Journal of Microelectronic Engineering, Vol. 86, No. 7-9, pp. 1564–1567, 2009.
  • J. S. Ayubi-Moak, B. Benbakhti, K. Kalna, G. W. Paterson, R. Hill, M. Passlack, I. Thayne and A. Asenov, "Effect of Interface State Trap Density on the Characteristics of n-type, Enhancement- Mode, Implant-Free In0.3Ga0.7As MOSFETs," 16th biannual conference of Insulating Films on Semiconductors: Cambridge, UK, June 29-July 1, 2009.
  • J. S. Ayubi-Moak, K. Kalna and A. Asenov, "High-Performance In0.75Ga0.25As Implant-Free n-type MOSFETs for Low Power Applications," 7th Spanish Conference on Electron Devices: Santiago de Compostela, Spain, Feb. 11-13, 2009.
  • D. Balaz, K. Kalna, M. Kuball, M. J. Uren and A. Asenov, "Impact of the field induced polarization space-charge on the characteristics of AlGaN/GaN HEMT: Self-consistent simulation study," Physica Status Solidi (c), Vol. 6, No. S2, p. S1007–S1011, May 2009.
  • D. Balaz, K. Kalna, M. Kuball, D. J. Hayes, M. J. Uren and A. Asenov, "Impact of surface charge on the I-V characteristics of an AlGaN/GaN HEMT," Workshop on Compound Semiconductor Devices and Integrated Circuits: Malaga, Spain, May 17-20, 2009.
  • D. Balaz, K. Kalna, M. Kuball, M. J. Uren and A. Asenov, "Systematic simulation study of the impact of virtual gate geometry on the current collapse in AlGaN/GaN HEMTs," UK Semiconductors: Sheffield, June 1-2, 2009.
  • B. Benbakhti, J. S. Ayubi-Moak, K. Kalna and A. Asenov, "Effect of Interface State Trap Density on the Performance of Scaled Surface Channel In0.3Ga0.7As MOSFETs," Journal of Physics: Conference Series, Vol. 193, p. 012122, 2009.
  • B. Benbakhti, J. S. Ayubi-Moak, K. Kalna and A. Asenov, "Effect of Interface State Trap Density on the Performance of Scaled Surface Channel In0.3Ga0.7As MOSFETs," 16th International Conference on Electron Dynamics in Semiconductors, Optoelectronics and Nanostructures: Montpellier, France, Aug. 24-28, 2009.
  • B. Benbakhti, J. S. Ayubi-Moak, K. Kalna and A. Asenov, "Impact of Interface Optical Phonons and Interface State Trap Density on Surface Channel and Implant Free III-V MOSFETs based on In0.3Ga0.7As channel," Silicon Nanoelectronics Workshop: Kyoto, Japan, June 13-14, 2009.
  • A. R. Brown, A. Martinez, N. Seoane and A. Asenov, "Comparison of Density Gradient and NEGF for 3D Simulation of a Nanowire MOSFET," in Proc. Spanish Conference on Electron Devices, Santiago de Compostela, Spain, Feb. 11-13, 2009, pp. 140–143.
  • M. Faiz. Bukhori, A. R. Brown, S. Roy and A. Asenov, "Simulation of statistical aspects of reliability in nano CMOS transistors," in Proc. International Integrated Reliability Workshop, ser. 2009 IIRW Final Report, California, Oct. 18-22, 2009, pp. 82–85.
  • B. Cheng, N. Moezi, D. Dideban, G. Roy, S. Roy and A. Asenov, "Benchmarking the Accuracy of PCA Generated Statistical Compact Model Parameters Against Physical Device Simulation and Directly Extracted Statistical Parameters," in Proc. Simulation of Semiconductor Processes and Devices, Sept. 9-11, 2009, pp. 143–146.
  • B. Cheng, S. Roy, A. R. Brown, C. Millar and A. Asenov, "Evaluation of statistical variability in 32 and 22 nm technology generation LSTP MOSFETs," Solid-State Electronics, Vol. 53, No. 7, pp. 767–772, July 2009.
  • N. A. Kamsani, B. Cheng, S. Roy and A. Asenov, "Impact of Random Dopant Induced Statistical Variability on Inverter Switching Trajectories and Timing Variability," in Proc. IEEE International Symposium on Circuits and Systems, Taipei, Taiwan, May 24-27, 2009,
  • P. Palestri, C. L. Alexander, A. Asenov, V. Aubry-Fortuna, G. Baccarani, A. Bournel, M. Braccioli, B. Cheng, P. Dolfus, A. Esposito, D. Esseni, C. Fenouillet-Beranger, C. Fiegna, G. Fiori, A. Ghetti, G. Iannaccone, A. Martinez, B. Majkusiak, S. Monfray, V. Peikert, S. Reggiani, C. Riddet, J. Saint-Martin, E. Sangiorgi, A. Schenk, L. Selmi, L. Silvestri, P. Toniutti and J. Walczak, "A comparison of advanced transport models for the computation of the drain current in nanoscale nMOSFETs," Solid-State Electronics, Vol. 53, No. 12, pp. 1293–1302, Dec. 2009.
  • D. Reid, C. Millar, G. Roy, S. Roy and A. Asenov, "Analysis of Threshold Voltage Distribution due to Random Dopants: A 100,000 Sample 3D Simulation Study," IEEE Transactions on Electron Devices, Oct. 2009.
  • D. Reid, C. Millar, G. Roy, S. Roy and A. Asenov, "Understanding LER-induced Statistical Variability: A 35,000 Sample 3D Simulation Study," Proc. ESSDERC 2009: Sept. 14-18, 2009.
  • D. Reid, C. Millar, G. Roy, S. Roy and A. Asenov, "Efficient Simulations of 6σ VT Distributions Due to Random Discrete Dopants," Proc. ULIS 2009: Mar. 2009.
  • D. Reid, C. Millar, G. Roy, S. Roy and A. Asenov, "Statistical enhancement of combined simulations of RDD and LER variability: What can simulation of a 10^5 sample teach us?" International Electron Devices Meeting 2009: Dec. 7-9, 2009.
  • N. Seoane, A. Martinez, A. R. Brown and A. Asenov, "Study of surface roughness in extremely small Si nanowire MOSFETs using fully-3D NEGFs," in Proc. Spanish Conference on Electron Devices, Santiago de Compostela, Spain, Feb. 11-13, 2009, pp. 180–183.
  • X. Wang, S. Roy and A. Asenov, "Impact of Strain on the Performance of high-k/metal replacement gate MOSFETs," in Proc. 10th ULIS, Aachen Germany, Mar. 18-20, 2009, pp. 289–292.

2008

  • C. L. Alexander, G. Roy and A. Asenov, "Random-Dopant-Induced Drain Current Variation in Nano-MOSFETs: A Three-Dimensional Self-Consistent Monte Carlo Simulation Study Using "ab initio" Ionized Impurity Scattering," IEEE Trans. Electron Devices, Vol. 55, No. 11, pp. 3251–3258, Nov. 2008.
  • A. Asenov, A. Cathignol, B. Cheng, K. P. McKenna, A. R. Brown, A. L. Shluger, D. Chanemougame, K. Rochereau and G. Ghibaudo, "Origin of the Asymmetry in the Magnitude of the Statistical Variability of n- and p-Channel Poly-Si Gate Bulk MOSFETs," IEEE Electron. Dev. Lett. Vol. 29, No. 8, pp. 913–915, 2008.
  • A. Asenov, S. Roy, A. R. Brown, G. Roy, C. L. Alexander, C. Riddet, C. Millar, B. Cheng, A. Martinez, N. Seoane, D. Reid, M. Faiz. Bukhori, X. Wang and U. Kovac, "Advanced simulation of statistical variability and reliability in nano CMOS transistors," in Proc. IEDM, USA, Dec. 2008, p. 421.
  • D. Balaz, K. Kalna, M. Kuball, M. J. Uren and A. Asenov, "Impact of the field induced polarization space-charge on the characteristics of AlGaN/GaN HEMT: Self-consistent simulation study," International Workshop on Nitride semiconductors: Oct. 6-10, 2008.
  • B. Bindu, B. Cheng, G. Roy, X. Wang, S. Roy and A. Asenov, "An efficient data sampling strategy for statistical parameter extraction of nano-MOSFETs," IEEE Workshop on Compact Modeling: Sept. 8-8, 2008.
  • A. R. Brown and A. Asenov, "Capacitance fluctuations in bulk MOSFETs due to random discrete dopants," Journal of Computational Electronics, Vol. 7, No. 3, pp. 115–118, 2008.
  • M. Faiz. Bukhori, S. Roy and A. Asenov, "Statistical Simulation of RTS Amplitude Distribution in Realistic Bulk MOSFETs Subject to Random Discreet Dopants," Ultimate Limits of Integration in Silicon 2008: Mar. 12-14, 2008.
  • M. Faiz. Bukhori, S. Roy and A. Asenov, "Statistical Aspects of Reliability in Bulk MOSFETs with Multiple Defect States and Random Discrete Dopants," Microelectronics Reliability, Vol. 48, No. 8-9, pp. 1549–1552, Aug. 2008.
  • A. Cathignol, B. Cheng, D. Chanemougame, A. R. Brown, K. Rochereau, G. Ghibaudo and A. Asenov, "Quantitative Evaluation of Statistical Variability Sources in a 45 nm Technological Node LP N-MOSFET," IEEE Electron. Dev. Lett. Vol. 29, No. 6, pp. 609–611, 2008.
  • B. Cheng, S. Roy and A. Asenov, "Simulation of intrinsic parameter fluctuations in CMOS: the link between physical device and circuit," Design Automation and Test in Europe: Workshop W2, Impact of Process Variability on Design and Test: Mar. 10-14, 2008.
  • B. Cheng, S. Roy, A. R. Brown, C. Millar and A. Asenov, "Evaluation of intrinsic parameter fluctuations in 45, 32 and 22 nm technology node LP n-MOSFETs," Proc. ESSDERC 2008: Sept. 15-19, 2008.
  • B. Cheng, S. Roy, A. R. Brown, C. Millar and A. Asenov, "Statistical Variations in 32nm Thin-Body SOI Devices and SRAM Cells," Proc. ICSICT 2008: 2008.
  • K. Kalna, A. Martinez, A. Svizhenko, M. P. Anantram, J. R. Barker and A. Asenov, "NEGF Simulations of the Effect of Strain on Scale Double Gate nanoMOSFET," J. Comp. Elec, 2008.
  • N. A. Kamsani, B. Cheng, S. Roy and A. Asenov, "Statistical Circuit Simulation with the Effect of Random Discrete Dopants in Nanometer MOSFET Devices," Design Automation and Test in Europe: Workshop W2, Impact of Process Variability on Design and Test: Munich, Germany, Mar. 10-14, 2008.
  • N. A. Kamsani, B. Cheng, S. Roy and A. Asenov, "Statistical Circuit Simulation with Supply-Voltage Scaling In Nanometre MOSFET Devices Under The Influence of Random Dopant Fluctuations," in Proc. 7th edition of Faible Tension Faible Consommation, Leuven, Belgium, May 26-28, 2008,
  • U. Kovac, D. Reid, C. Millar, G. Roy, S. Roy and A. Asenov, "Statistical simulation of random dopant induced threshold voltage fluctuations for 35 nm channel length MOSFET," Microelectronics Reliability, Vol. 48, No. 8-9, pp. 1572–1575, 2008.
  • S. Markov, S. Roy, C. Fiegna, E. Sangiorgi and A. Asenov, "On the sub-nm EOT scaling of high-K gate stacks," Ultimate Limits of Integration in Silicon 2008: Mar. 12-14, 2008.
  • S. Markov, P. V. Sushko, S. Roy, C. Fiegna, E. Sangiorgi, A. L. Shluger and A. Asenov, "Si-SiO2 interface band-gap transition - effects on MOS inversion layer," Physica Status Solidi (a), Vol. 205, No. 6, pp. 1290–1295, 2008.
  • A. Martinez, K. Kalna, A. Svizhenko, M. P. Anantram, J. R. Barker and A. Asenov, "Impact of strain on scaling of Double Gate nanoMOSFETs using NEGF approach," Physica Status Solidi C - Current Topics in Solid State Physics, Vol. 5, No. 1, pp. 47–51, 2008.
  • A. Martinez, K. K. Kalna, P. V. Sushko, A. L. Shluger, J. R. Barker and A. Asenov, "Impact of Body-Thickness-Dependent Bandstructure on Scaling of Double Gate MOSFETs : A DFT/NEGF Study," IEEE Trans. Nanotechnology, 2008.
  • A. Martinez, M. Bescond, A. R. Brown, J. R. Barker and A. Asenov, "A Full Non-Equillibrium Green Functions Study of an Stray charge in a Nanowire MOS," J. Comp. Elec, 2008.
  • C. Millar, R. Madathil, O. Beckstein, M. S. P. Sansom, S. Roy and A. Asenov, "Brownian simulation of charge transport in α-Haemolysin," Journal of Computational Electronics, 2008.
  • C. Millar, S. Roy, D. Cumming, T. Drysdale, S. Furber, D. Edwards, M. Zwolinski, A. Tyrrell, A. Murray, S. Pickles, R. O. Sinnott, D. Berry and A. Asenov, "Meeting the Design Challenges of Nano-CMOS Electronics," in Proc. Workshop on the Impact of Process Variability on Design and Test, Mar. 2008,
  • C. Millar, S. Roy, D. R. S. Cumming, T. D. Drysdale, S. Furber, D. Edwards, M. Zwolinski, A. M. Tyrrell, A. F. Murray, S. Pickles, R. O. Sinnott, D. Berry and A. Asenov, "Meeting the Design Challenges of nano-CMOS Electronics," Design Automation and Test in Europe: Workshop W2, Impact of Process Variability on Design and Test: Mar. 10-14, 2008.
  • C. Millar, D. Reid, G. Roy, S. Roy and A. Asenov, "Accurate Statistical Description of Random Dopant Induced Threshold Voltage Variability," IEEE Electron Device Letters, Vol. 29, No. 8, pp. 946–948, Aug. 2008.
  • S. H. Paluchowski, B. Cheng, S. Roy, A. Asenov and D. R. S. Cumming, "Investigation into effects of device variability on CMOS layout motifs," Electronics Letters, Vol. 44, No. 10, pp. 626–627, May 2008.
  • D. Reid, C. Millar, S. Roy, G. Roy, R. O. Sinnott, G. Stewart, G. Stewart and A. Asenov, "An Accurate Statistical Analysis of Random Dopant Induced Variability in 140,000 13nm MOSFETs," Silicon Nanoelectronics Workshop 2008: June 15-16, 2008.
  • D. Reid, C. Millar, S. Roy, R. O. Sinnott, G. Stewart, G. Stewart and A. Asenov, "Prediction of Random Dopant Induced Threshold Voltage Fluctuations in NanoCMOS Transistors," Simulation of Semiconductor Processes and Devices 2008: Sept. 9-11, 2008.
  • D. Reid, S. Roy, C. Millar, G. Roy, R. O. Sinnott, G. Stewart and A. Asenov, "Supporting Statistical Semiconductor Analysis using EGEE and OMII-UK Middleware," EGEE 3rd User Forum: Feb. 2008.
  • D. Reid, C. Millar, A. Asenov, S. Roy, G. Roy, R. O. Sinnott and G. Stewart, "Supporting Statistical Semiconductor Device Analysis using EGEE and OMII-UK Middleware," EGEE User Conference: Clermont-Ferrand, France, Feb. 2008.
  • D. Reid, C. Millar, S. Roy, G. Roy, R. O. Sinnott, G. Stewart, G. Stewart and A. Asenov, "Enabling Cutting-Edge Semiconductor Simulation through Grid Technology," All Hands Meeting 2008: Sept. 2008.
  • C. Riddet, A. R. Brown, S. Roy and A. Asenov, "Boundary Conditions for Density Gradient Corrections in 3D Monte Carlo Simulations," Journal of Computational Electronics, Vol. 7, No. 3, pp. 231–235, 2008.
  • C. Riddet and A. Asenov, "Convergence Properties of Density Gradient Quantum Corrections in 3D Ensemble Monte Carlo Simulations," in Proc. Simulation of Semiconductor Processes and Devices 2008, Hakone, Japan, pp. 261–264.
  • S. Roy, C. Millar and A. Asenov, "Impact of Device Variability on Design," Ultimate Limits of Integration in Silicon 2008: Mar. 12-14, 2008.
  • S. Roy, C. Millar and A. Asenov, "Statistical Compact Modelling as a Tool in Understanding Circuit Variability," Design Automation and Test in Europe: Workshop W2, Impact of Process Variability on Design and Test: Mar. 10-14, 2008.
  • S. Roy, B. Cheng and A. Asenov, "Impact of Intrinsic Parameter Fluctuations in Nano-CMOS Devices on Circuits and Systems," in PHYSICS AND MODELING OF TERA- AND NANO-DEVICES, ser. Selected Topics in Electronics and Systems, M. Ryzhii and V. Ryzhii, Eds. New York, USA: World Scientific, 2008,
  • N. Seoane, A. Martinez, A. R. Brown, J. R. Barker and A. Asenov, "3D NEGF simulation of ‘ab initio’ scattering from discrete dopants in the source and drain of a nanowire transistor," in Proc. Silicon Nanoelectronics Workshop, Honolulu, HI, USA, June 15-16, 2008,
  • R. O. Sinnott, A. Asenov, C. Bayliss, C. Davenhall, T. Doherty, B. Harbulot, M. Jones, D. Martin, C. Millar, G. Roy, S. Roy, G. Stewart and J. Watt, "Integrating Security Solutions to Support nanoCMOS Electronics Research," IEEE International Symposium on Parallel and Distributed Processing Systems with Applications: Sydney, Australia, Dec. 2008.
  • R. O. Sinnott, A. Asenov, C. Millar, D. Berry, B. Harbulot, D. Reid, G. Roy, S. Roy and G. Stewart, "Meeting the Design Challenges of nanoCMOS Electronics through Secure, Large-scale Simulation and Data Management," EGEE User Conference: Istanbul Turkey, Oct. 2008.
  • R. O. Sinnott, C. Bayliss, C. Millar, G. Stewart, G. Roy, S. Roy, D. Reid, B. Harbulot, C. Davenhall, A. Asenov and J. Watt, "Secure, Performance-Oriented Data Management for nanoCMOS Electronics," in Proc. e-Science 2008 Conference, Indiana, USA,
  • R. O. Sinnott, A. Asenov and C. Millar, "Supercomputing at Work in the nanoCMOS Electronics Domain," ERCIM News, vol. 74, pp. 22–23, July 2008.
  • X. Wang, B. Cheng, S. Roy and A. Asenov, "Simulation of Strain Enhanced Variability in nMOSFETs," in Proc. Ultimate Integration on Silicon, Udine Italy, Mar. 12-14, 2008, pp. 89–92.
  • X. Wang, S. Roy and A. Asenov, "Impact of Strain on LER Variability in bulk MOSFETs," in Proc. 38th European Solid-State Device Research Conference (ESSDERC), Edinburgh Scotland U.K. Sept. 15-19, 2008, pp. 190–193.
  • X. Wang, S. Roy and A. Asenov, "High Performance MOSFET Scaling Study from Bulk 45 nm Technology Generation," in Proc. 9th International Conference on Solid-State and Integrated-Circuit Technology (ICSICT), Beijing China, Oct. 20-23, 2008, pp. 484–487.

2007

  • A. Asenov, K. Kalna, I. G. Thayne and R. J. W. Hillman, "Simulation of implant free III-V MOSFETs for high performance low power Nano-CMOS applications," Microelectronic Engineering, Vol. 84, No. 9-10, pp. 2398–2403, 2007.
  • A. Asenov, C. Millar, S. Roy, D. R. S. Cumming, R. O. Sinnott, G. Stewart, A. F. Murray, D. Berry, A. M. Tyrrell, J. Hilder, S. Furber, S. Pickles, M. McKeown, M. Zwolinski and D. De Roure, "Meeting the Design Challenges of nano-CMOS Electronics," Third International Nanotechnology Conference on Communication and Cooperation: Apr. 16-17, 2007.
  • A. R. Brown, G. Roy and A. Asenov, "Poly-Si Gate Related Variability in Decananometre MOSFETs with Conventional Architecture," IEEE Trans. Electron Dev. Vol. 54, No. 11, pp. 3056–3063, 2007.
  • A. R. Brown, A. Martinez, M. Bescond and A. Asenov, "Nanowire MOSFET variability: a 3D density gradient versus NEGF approach," in Proc. Silicon Nanoelectronics Workshop, Kyoto, Japan, June 10-11, 2007, pp. 127–128.
  • B. Cheng, S. Roy and A. Asenov, "CMOS 6-T SRAM cell design subject to ''atomistic" fluctuations," Solid-State Electronics, Vol. 51, No. 4, pp. 565–571, 2007.
  • B. Cheng, S. Roy and A. Asenov, "The scalability of 8T-SRAM cells under the influence of intrinsic parameter fluctuations," E-MRS IUMRS ICEM 2006 Spring Meeting, Symposium E p1 35: Sept. 11-13, 2007.
  • B. Cheng, S. Roy and A. Asenov, "Statistical compact model parameter extraction strategy for intrinsic parameter fluctuations," in Proc. Simulation of Semiconductor Processes and Devices, T. Graser and S. Selberherr, Eds., Vienna, Austria, Sept. 2007, pp. 301–304.
  • B. Cheng, S. Roy and A. Asenov, "Impacts of Random Dopant Fluctuation on Nanometer CMOS Logic Styles," in Proc. 8th International Conference on Ultimate Integration on Silicon, Leuven, Belgium, Mar. 15-16, 2007, pp. 25–28.
  • T. D. Drysdale, A. R. Brown, G. Roy, S. Roy and A. Asenov, "Interconnect variability within standard cells," 12th International Workshop on Computational Electronics: Oct. 8-10, 2007.
  • T. D. Drysdale, A. R. Brown, S. Roy, G. Roy and A. Asenov, "Capacitance variability of short range interconnects," Journal of Computational Electronics, Dec. 2007.
  • G. Ferrari, J. R. Watling, S. Roy, J. R. Barker, P. Zeitzoff, G. Bersuker and A. Asenov, "On the Impact of High-k Gate Stacks on Mobility: A Monte Carlo Study Including Coupled SO Phonon-plasmon Scattering," J. Computational Electronics, 2007.
  • G. Ferrari, J. R. Watling, S. Roy, J. R. Barker and A. Asenov, "Beyond SiO2 technology: Simulation of the impact of high-kappa dielectrics on mobility," Journal of Non-Crystalline Solids, Vol. 353, No. 5-7, pp. 630–634, 2007.
  • C. Fujihashi, T. Yukiya and A. Asenov, "Electron and hole current characteristics of n-i-p-type semiconductor quantum dot transistor," IEEE Transactions on Nanotechnology, Vol. 6, No. 3, pp. 320–327, 2007.
  • L. Han, R. O. Sinnott, G. Stewart, A. Asenov, S. Roy, G. Roy, C. Millar and D. Berry, "Towards a Grid-Enabled Simulation Framework for Nano-CMOS Electronics," IEEE e-Science 2007 Conference: 2007.
  • K. Kalna, R. Droopad, M. Passlack and A. Asenov, "Monte Carlo simulations of InGaAs nano-MOSFETs," Microelectronic Engineering, Vol. 84, No. 9-10, pp. 2150–2153, 2007.
  • K. Kalna, J. A. Wilson, D. A. J. Moran, R. J. W. Hillman, A. R. Long, R. Droopad, M. Passlack, I. G. Thayne and A. Asenov, "Monte Carlo simulations of high-performance implant free In0.3Ga0.7As nano-MOSFETs for low-power CMOS applications," IEEE Transactions on Nanotechnology, Vol. 6, No. 1, pp. 106–112, 2007.
  • S. Markov, A. R. Brown, B. Cheng, G. Roy, S. Roy and A. Asenov, "Three-dimensional statistical simulation of gate leakage fluctuations due to combined interface roughness and random dopants," Japanese Journal of Applied Physics Part 1-Regular Papers Brief Communications & Review Papers, Vol. 46, No. 4B, pp. 2112–2116, 2007.
  • S. Markov, N. Barin, C. Fiegna, S. Roy, E. Sangiorgi and A. Asenov, "Analysis of silicon dioxide transitional region in MOS structures," in Proc. Simulation of Semiconductor Processes and Devices, T. Graser and S. Selberherr, Eds., Vienna, Austria, Sept. 2007, pp. 149–152.
  • S. Markov, S. Roy, C. Fiegna, E. Sangiorgi and A. Asenov, "Band-gap and permittivity change at high-k gate stack interfaces - device perspective," 38th IEEE Semiconductor Interface Specialists Conference: 2007.
  • A. Martinez, M. Bescond, J. R. Barker, A. Svizhenko, M. P. Anantram, C. Millar and A. Asenov, "A self-consistent full 3-D real-space NEGF simulator for studying nonperturbative effects in nano-MOSFETs," IEEE Transactions on Electron Devices, Vol. 54, No. 9, pp. 2213–2222, 2007.
  • A. Martinez, J. R. Barker, A. Svizhenko, M. P. Anantram and A. Asenov, "The impact of random dopant aggregation in source and drain on the performance of ballistic DG Nano-MOSFETs: A NEGF study," IEEE Transactions on Nanotechnology, Vol. 6, No. 4, pp. 438–445, 2007.
  • A. Martinez, K. Kalna, J. R. Barker and A. Asenov, "A study of the interface roughness effect in Si nanowires using a full 3D NEGF approach," Physica E-Low-Dimensional Systems & Nanostructures, Vol. 37, No. 1-2, pp. 168–172, 2007.
  • C. Millar, S. Roy, A. R. Brown and A. Asenov, "Simulating the bio-nanoelectronic interface," Journal of Physics-Condensed Matter, Vol. 19, No. 21, 2007.
  • C. Millar, S. Roy, O. Beckstein, M. S. P. Sansom and A. Asenov, "Continuum versus particle simulation of model nano-pores," Journal of Computational Electronics, Vol. 6, pp. 367–371, 2007.
  • C. Millar, R. Madathil, O. Beckstein, M. S. P. Sansom, S. Roy and A. Asenov, "Brownian simulation of charge transport in alpha-haemolysin," 12th International Workshop on Computational Electronics: Oct. 8-10, 2007.
  • C. Riddet, A. R. Brown, C. L. Alexander, J. R. Watling, S. Roy and A. Asenov, "3-D Monte Carlo simulation of the impact of quantum confinement scattering on the magnitude of current fluctuations in double gate MOSFETs," IEEE Transactions on Nanotechnology, Vol. 6, No. 1, pp. 48–55, 2007.
  • C. Riddet, A. R. Brown, S. Roy and A. Asenov, "Boundary conditions for density gradient corrections in 3D Monte Carlo simulations," 12th International Workshop on Computational Electronics: Oct. 8-10, 2007.
  • S. Roy, B. Cheng and A. Asenov, "Impact of Intrinsic Parameter Fluctuations in nano-CMOS Devices on Circuits and Systems," International Journal of High Speed Electronics and Systems, Vol. 17, No. 3, pp. 501–508, 2007.
  • K. Samsudin, F. Adamu-Lema, A. R. Brown, S. Roy and A. Asenov, "Combined sources of intrinsic parameter fluctuations in sub-25 nm generation UTB-SOI MOSFETs: A statistical simulation study," Solid-State Electronics, Vol. 51, No. 4, pp. 611–616, 2007.
  • N. Seoane, A. J. Garcia-Loureiro, K. Kalna and A. Asenov, "Impact of intrinsic parameter fluctuations on the performance of HEMTs studied with a 3D parallel drift-diffusion simulator," Solid-State Electronics, Vol. 51, No. 3, pp. 481–488, 2007.
  • R. O. Sinnott, A. Asenov, A. R. Brown, C. Millar, S. Roy, G. Roy and G. Stewart, "Grid Infrastructures for the Electronics Domain: Requirements and Early Prototypes from an EPSRC Pilot Project," in Proc. UK e-Science All Hands Meeting, Nottingham, UK, 2007, pp. 509–516.

2006

  • M. Aldegunde, A. J. Garcia-Loureiro, K. Kalna and A. Asenov, "3D finite element parallel simulator for studying fluctuations in advanced MOSFETs," in Proc. Proc. 11th International Workshop on Computational Electronics, p. 37.
  • C. L. Alexander, G. Roy and A. Asenov, "Increased intrinsic parameter fluctuations through ab initio Monte Carlo simulations in nano-scaled MOSFETs," in Proc. International Electron Devices Meeting 2006, ser. International Electron Devices Meeting 2006, IEDM, San Fransisco, CA, USA, Dec. 11-13, 2006,
  • A. Asenov, "A 3D finite element parallel simulator for studying fluctuations in advanced MOSFETs," ser. 11th International Workshop on Computational Electronics, IWCE 2006, Vienna, Austria, p. 37.
  • A. Asenov, A. R. Brown, G. Roy, C. L. Alexander and A. Martinez, "Simulation of Atomic Scale Effects and Fluctuations in nano-scale CMOS," in Proc. Solid-State Devices and Materials (SSDM), Yokohama, Japan, Sept. 12-15, 2006, pp. 358–359.
  • A. Asenov and K. Samsudin, "Variability in nanoscale SOI devices and its impact on circuits and systems," ser. Nano scaled semiconductor-on-insulator structures and devices, Crimea, Ukraine, pp. 79–79.
  • A. Asenov, A. R. Brown, B. Cheng, J. R. Watling, G. Roy and C. L. Alexander, "Simulation of nano-CMOS devices: from atoms to architecture," in Nanotechnology for Electronic Materials and Devices, A. Korkin, J. Labanowski, E. Gusev and S. Luryi, Eds. New York: Springer, 2006, pp. 257–303.
  • J. R. Barker, A. Martinez, A. Svizhenko, M. P. Anantram and A. Asenov, "Green function study of quantum transport in ultra-small devices with embedded atomistic cluster," Journal of Physics Conferences Series, Vol. 38, pp. 233–246, 2006.
  • M. Bescond, N. Cavassilas, A. Asenov and M. Lannoo, "Effective-mass approach for n-type semiconductor nanowire MOSFETs arbitrary oriented," in Proc. Proc. ULIS 2006, pp. 73–76.
  • A. R. Brown, J. R. Watling and A. Asenov, "Intrinsic Parameter Fluctuations due to Random Grain Orientations in High-k Gate Stacks," J. Computational Electronics, Vol. 5, pp. 333–336, 2006.
  • A. R. Brown, J. R. Watling and A. Asenov, "Intrinsic Parameter Fluctuations due to Random Grain Orientations in High-k Gate Stacks," in Proc. Book of Abstracts of the 11th International Workshop on Computational Electronics (IWCE), Vienna, Austria, May 25-27, 2006, pp. 49–50.
  • A. R. Brown, G. Roy and A. Asenov, "Impact of Fermi level pinning at polysilicon gate grain boundaries on nano-MOSFET variability: A 3-D simulation study," in Proc. 36th European Solid-State Device Research Conference (ESSDERC), Montreux, Switzerland, Sept. 19-21, 2006, pp. 451–454.
  • B. Cheng, S. Roy and A. Asenov, "Low power, high density CMOS 6-T SRAM cell design subject to ‘atomistic’ fluctuations," in Proc. Proc. ULIS 2006, ISBN:88-900874-0-8, p. 33.
  • B. Cheng, S. Roy, G. Roy, A. R. Brown and A. Asenov, "Design Consideration of 6-T SRAM towards the End of Bulk CMOS Technology Scaling Subjected to Random Dopant Fluctuation," in Proc. Proc 36th European Solid-State Device Research Conference (ESSDERC),
  • B. Cheng, S. Roy and A. Asenov, "The Impact of Intrinsic Parameter Fluctuations on Decananometer Circuits, and Circuit Modelling Techniques," in Proc. International Conference - Mixed Design of Integrated Circuits and Systems (MIXDES 2006), June.
  • B. Cheng, S. Roy and A. Asenov, Eds., Impact of Random Dopant Fluctuation on Bulk CMOS 6-T SRAM Scaling, 2006, Montreux, Switzerland,
  • G. Ferrari, C. Jacoboni, M. Nedjalkov and A. Asenov, "Introducing energy broadening in semiclassical Monte Carlo simulations," ser. 11th International Workshop on Computational Electronics, IWCE 2006, Vienna, Austria, p. 17.
  • G. Ferrari, J. R. Watling, S. Roy, J. R. Barker and A. Asenov, "Beyond SiO2 technology: The impact of high-k dielectrics," ser. 6 th symposium SiO 2 , advanced dielectrics and related devices : SiO2006,
  • G. Ferrari, J. R. Watling, S. Roy, J. R. Barker, P. Zeitzoff, G. Bersuker and A. Asenov, "Monte Carlo study of mobility in Si devices with HfO2 based oxides," ser. E-MRS IUMRS ICEM 2006, Nice, France, p. i.
  • G. Ferrari, J. R. Watling, S. Roy, J. R. Barker, P. Zeitzoff, G. Bersuker and A. Asenov, "On the impact of high-k gate stacks on mobility: a Monte Carlo study including coupled SO phonon-plasmon scattering," ser. 11th International Workshop on Computational Electronics, IWCE 2006, Vienna, Austria, p. 111.
  • G. Ferrari, J. R. Watling, S. Roy, J. R. Barker, P. Zeitzoff, G. Bersuker and A. Asenov, "Monte Carlo study of mobility in Si devices with HfO2-based oxides," Materials Science in Semiconductor Processing, Vol. 9, No. 6, pp. 995–999, 2006.
  • G. Ferrari, A. Asenov, M. Nedjalkov and C. Jacoboni, "Introducing energy broadening in semiclassical Monte Carlo simulations," J. Computational Electronics, 2006.
  • M. M. Frank, A. Asenov, J. Fompeyrine, J. W. Seo and P. D. Ye, "From strained silicon to nanotubes- Novel channels for field effect devices," Materials Science and Engineering B-Solid State Materials for Advanced Technology, Vol. 135, No. 3, pp. 177–178, 2006.
  • K. Kalna, R. J. W. Hillman, J. A. Wilson, D. A. J. Moran, A. R. Long, A. Asenov and I. G. Thayne, "Monte Carlo simulation of sub-30 nm high indium implant free III-V MOSFETs for low power digital applications," ser. UK III-V Compound Semiconductors 2006,
  • K. Kalna, Q. Wang, M. Passlack and A. Asenov, "Monte Carlo simulations of delta-doping placement in sub-100 nm implant free InGaAs MOSFETs," Materials Science and Engineering B-Solid State Materials for Advanced Technology, Vol. 135, No. 3, pp. 285–288, 2006.
  • K. Kalna, Q. Wang, M. Passlack and A. Asenov, "MC simulation of delta doping placement in sub 100nm implant free InGaAs MOSFETs," ser. E-MRS IUMRS ICEM 2006, Nice, France, p. i.
  • K. Kalna, J. A. Wilson, D. A. J. Moran, R. J. W. Hillman, A. R. Long, R. Droopad, M. Passlack, I. G. Thayne and A. Asenov, "MC simulation of high performance InGaAs nano-MOSFETs for low power CMOS applications," ser. IEEE 2006 Silicon Nanoelectronics Workshop, Honolulu, p. 13.
  • K. Kalna, A. Asenov and M. Passlack, "Monte Carlo simulation of implant free InGaAs MOSFET," Journal of Physics: Conference Series, Vol. 38, pp. 200–203, 2006.
  • S. Markov, A. R. Brown, B. Cheng, G. Roy, S. Roy and A. Asenov, "3D statistical simulation of gate leakage fluctutations due to combined interface roughness and random dopants," in Proc. Solid-State Devices and Materials (SSDM), Yokohama, Japan, Sept. 12-15, 2006, pp. 362–363.
  • A. Martinez, J. R. Barker, M. P. Anantram, A. Svizhenko and A. Asenov, "Developing a full 3D NEGF simulator with random dopant and interface roughness," ser. 11th International Workshop on Computational Electronics, IWCE 2006, Vienna, Austria, p. 275.
  • A. Martinez, J. R. Barker, A. Svizhenko, M. P. Anantram, M. Bescond and A. Asenov, "Development of a Full 3D NEGF Nano-CMOS simulator," ser. International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2006, California,USA,
  • A. Martinez, J. R. Barker, A. Svizhenko, M. P. Anantram, A. R. Brown, B. Biegel and A. Asenov, "The unintentional discrete charges in a nominally undoped channel of a thin body double gate MOSFET: Classical to Full Quantum Simulation," Journal of Physics Conferences Series, Vol. 38, pp. 192–195, 2006.
  • A. Martinez, A. Svizhenko, M. P. Anantram, J. R. Barker and A. Asenov, "A NEGF study of the effect of surface roughness on CMOS nanotransistors," Progress in Nonequilibrium Green'S Functions Iii, Vol. 35, pp. 269–274, 2006.
  • A. Martinez, A. Svizhenko, M. P. Anantram, J. R. Barker and A. Asenov, "A NEGF study of the effect of surface roughness on CMOS nanotransistors," Journal of Physics: Conference Series, Vol. 135, 2006.
  • A. Martinez, J. R. Barker, A. Svizhenko, M. P. Anantram and A. Asenov, "The impact of random dopant aggregation in source and drain on the performance of ballistic DG nano-MOSFETs," in Proc. Proc. IEEE 2006 Silicon Nanoelectronics Workshop, p. 133, Honolulu,
  • A. Martinez, K. Kalna, J. R. Barker and A. Asenov, "A study of the interface roughness effects in Si-nanowires using a full 3D NEGF approach," in Proc. E-MRS IUMRS ICEM 2006 Spring Meeting, Symposium E p1 35,
  • C. Millar, S. Roy and A. Asenov, "Simulation of Bio-Nano-CMOS devices," ser. E-MRS IUMRS ICEM 2006, Nice, France, p. i.
  • C. Millar, S. Roy, O. Beckstein, M. S. P. Sansom and A. Asenov, "Continuum versus particle simulation of model nano-pores," ser. 11th International Workshop on Computational Electronics, IWCE 2006, Vienna, Austria, p. 367.
  • C. Millar, S. Roy, O. Beckstein, M. S. P. Sansom and A. Asenov, "Continuum Vs. Particle Simulations of Model Nano-Pores," J. Computational Electronics, 2006.
  • C. Millar, A. Asenov and S. Roy, "P3M Modelling of Biological Systems," in Proc. E-MRS IUMRS ICEM 2006 Spring Meeting, Symposium Q, July.
  • C. Riddet, A. R. Brown, C. L. Alexander, S. Roy and A. Asenov, "Efficient density gradient quantum corrections for 3D Monte Carlo simulations," ser. International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2006, California,USA,
  • G. Roy, A. R. Brown, F. Adamu-Lema, S. Roy and A. Asenov, "Simulation study of individual and combined sources of intrinsic parameter fluctuations in conventional nano-MOSFETs," IEEE Transactions on Electron Devices, Vol. 53, No. 12, pp. 3063–3070, 2006.
  • G. Roy, A. R. Brown, F. Adamu-Lema, S. Roy and A. Asenov, "Intrinsic Parameter Fluctuations in Conventional MOSFETs until end of the ITRS," Journal of Physics Conferences Series, Vol. 38, pp. 188–191, 2006.
  • S. Roy, B. Cheng and A. Asenov, "Impact of intrinsic parameter fluctuation in nano-CMOS devices on circuits and systems," ser. International Topical Workshop on Tera- and Nano- Devices: Physics and Modelling, pp. 24–25.
  • K. Samsudin, F. Adamu-Lema, A. R. Brown, S. Roy and A. Asenov, "Intrinsic parameter fluctuations in sub-10nm generation UTB SOI MOSFETs," ser. 7 th European Workshop on ULtimate Integration of Silicon , ULIS 2006, pp. 93–96.
  • K. Samsudin, B. Cheng, A. R. Brown, S. Roy and A. Asenov, "Sub-25 nm UTB SOISRAM cell under the influence of discrete random dopants," Solid-State Electronics, Vol. 50, No. 4, pp. 660–667, 2006.
  • K. Samsudin, B. Cheng, A. R. Brown, S. Roy and A. Asenov, "Integrating intrinsic parameter fluctuation description into BSIMSOI to forecast sub-15 nm UTB SOI based 6T SRAM operation," Solid-State Electronics, Vol. 50, No. 1, pp. 86–93, 2006.
  • N. Seoane, A. J. Garcia-Loureiro, K. Kalna and A. Asenov, "Atomistic effect of delta doping layer in a 50 nm InP HEMT," Journal of Computational Electronics, Vol. 5, pp. 131–135, 2006.
  • N. Seoane, A. J. Garcia-Loureiro, K. Kalna and A. Asenov, "Current variations in PHEMTS introduced by channel composition fluctuations," Journal of Physics Conferences Series, Vol. 38, pp. 212–215, 2006.
  • N. Seoane, A. J. Garcia-Loureiro, K. Kalna and A. Asenov, "A 3D parallel simulation of the effect of interface charge fluctuations in HEMTs," ser. 11th International Workshop on Computational Electronics, IWCE 2006, Vienna, Austria, p. 81.
  • R. O. Sinnott, A. Asenov, D. Berry, S. Roy, S. Furber, D. R. S. Cumming, A. Tyrrell, A. F. Murray, M. Zwolinski, S. Pickles and C. Millar, "Meeting the Design Challenges of nanoCMOS Electronics: An Introduction to an EPSRC Pilot Project," in Proc. UK e-Science All Hands Meeting, Sept. 2006,
  • I. G. Thayne, D. A. J. Moran, K. Kalna, A. Asenov, K. Elgaid, R. J. W. Hillman, J. A. Wilson, A. R. Long, X. Li, H. P. Zhou, D. S. Macintyre, S. Thoms, M. C. Holland and C. R. Stanley, "III-V MOSFETs for Digital Applications: an overview," ser. UK III-V Compound Semiconductors 2006, Sheffield, UK,

2005

  • C. L. Alexander, A. R. Brown, J. R. Watling and A. Asenov, "Impact of single charge trapping in nano-MOSFETs - Electrostatics versus transport effects," IEEE Transactions on Nanotechnology, Vol. 4, No. 3, pp. 339–344, 2005.
  • C. L. Alexander, A. R. Brown, J. R. Watling and A. Asenov, "Impact of scattering in 'atomistic' device simulations," Solid-State Electronics, Vol. 49, No. 5, pp. 733–739, 2005.
  • A. Asenov and G. H. Bernstein, "Special Issue on 2004 Silicon Nanoelectronics Workshop - Guest editorial," IEEE Transactions on Nanotechnology, Vol. 4, No. 3, pp. 301–302, 2005.
  • A. Asenov, "Nano CMOS devices and their integration in giga transistor chips," ser. Future of Intergrated Systems - FIS,
  • A. Asenov, "Monte Carlo simulation of nanotransistors and giga circuits on HPC," ser. 5th International Conference on Large-Scale Scientific Computations,
  • J. R. Barker, A. Martinez, A. Svizhenko, M. P. Anantram and A. Asenov, "Green function study of quantum transport in ultrasmall devices with embedded atomistic clusters," ser. 3rd International Workshop on Progress in non-equilibrium Green functions,
  • J. R. Barker, J. R. Watling, A. R. Brown, S. Roy, P. Zeitzoff, G. Bersuker and A. Asenov, "Monte Carlo study of couples SO phonon-plasmon scattering in Si MOSFETs with high-k dielectric gate stacks: hot electron and disorder effects," in Proc. 14th International Conference on Hot Carriers in Semiconductors (HCIS14), July p. TU 4–2.
  • M. Bescond, N. Cavassilas, K. Kalna, K. Nehari, L. Raymond, J. L. Autran, M. Lanu and A. Asenov, "Ballistic transport in Si, Ge and GaAs Nanowire MOSFETs," ser. IEEE International Electron Device Meeting, Washington DC, USA, pp. 533–536.
  • M. Bescond, N. Cavassilas, K. Nehari, J. L. Autran, M. Lannoo and A. Asenov, "Impact of point defects in nanowire silicon MOSFETs," ser. European Solid-State Device Research Conference 2005 - ESSDERC2005, Grenoble, France,
  • M. Bescond, N. Cavassilas, L. Raymond and A. Asenov, "Effective masses in arbitrary oriented ballistic nanowire MOSFETS," ser. 14th International Conference on Nonequilibrium Carrier Dynamics in Semiconductors - HCIS, Chicago, USA, p. 42.
  • M. Bescond, N. Cavassilas, K. Kalna, K. Nehari, J. L. Autran, M. Lannoo and A. Asenov, "Simulation study of performance limits for Si, Ge, and GaAs ballistic nanowire MOSFETs," in Proc. Proc. Silicon Nanoelectronics Workshop (SNW 2005), Kyoto, Japan, June pp. 8–9.
  • A. R. Brown, A. Asenov, S. Roy and J. R. Barker, "Parallel 3D finite element power semiconductor device simulator based on topologically rectangular grid," in Proc. Simulation of Semiconductor Devices and Processes, 2005, pp. 336–339.
  • A. R. Brown, J. R. Watling, A. Asenov, G. Bersuker and P. Zeitzoff, "Intrinsic parameter fluctuations in MOSFETs due to structural non-uniformity of high-k gate stack materials," in Proc. 2005 International Conference on Simulation of Semiconductor Processes and Devices, Tokyo, Japan, Sept. 1-3, 2005, pp. 27–30.
  • B. Cheng, S. Roy, G. Roy, F. Adamu-Lema and A. Asenov, "Impact of intrinsic parameter fluctuations in decanano MOSFETs on yield and functionality of SRAM cells," Solid-State Electronics, Vol. 49, No. 5, pp. 740–746, 2005.
  • B. Cheng, S. Roy, A. Martinez and A. Asenov, "Impact of Oxide Thickness Fluctuation on MOSFETs Gate Tunnelling," in Proc. Proc SSDM (Japan 2005),
  • A. J. Garcia-Loureiro, K. Kalna and A. Asenov, "Efficient three-dimensional parallel simulations of PHEMTs," International Journal of Numerical Modelling-Electronic Networks Devices and Fields, Vol. 18, No. 5, pp. 327–340, 2005.
  • A. J. Garcia-Loureiro, K. Kalna and A. Asenov, "New sources of intrinsic parameter fluctuations introduced by a high-k dielectric in sub-100nm Si MOSFETs," ser. 18th International Conference on Noise and Fluctuations, Salamanca, Spain, pp. 239–242.
  • K. Kalna, L. Yang and A. Asenov, "Fermi-dirac statistics in Monte Carlo simulations of InGaAs MOSFETs," ser. 14th International Conference on Nonequilibrium Carrier Dynamics in Semiconductors - HCIS, Chicago, USA,
  • K. Kalna, A. Asenov and M. Passlack, "Monte Carlo simulation of implant free InGaAs MOSFETs," ser. New Phenomena in Mesoscopic Structures - 7 (NPMS) and the fifth in the series of Surfaces and Interfaces of Mesoscopic Devices (SIMD), NPMS-7/ SIMD-5,
  • K. Kalna, L. Yang and A. Asenov, "Monte Carlo simulation of sub-100 nm InGaAs MOSFETs for Digital applications," in Proc. Proc 35th European Solid-State Device Research Conference (ESSDERC), Sept. pp. 169–172.
  • K. Kalna, K. Elgaid, I. G. Thayne and A. Asenov, "Modelling of InP HEMTs with high Indium content channels," in Proc. Proc. Indium Phosphide and Related Materials Conf. pp. 61–65.
  • A. Martinez, J. R. Barker, A. Svizhenko, M. Bescond, M. P. Anantram and A. Asenov, "A 2D-NEGF quantum transport study of unintentional charges in a double gate nanotransistor," ser. 14th International Conference on Nonequilibrium Carrier Dynamics in Semiconductors - HCIS, Chicago, USA,
  • A. Martinez, J. R. Barker, A. Svizhenko, M. P. Anantram, A. R. Brown, B. Biegel and A. Asenov, "The impact of unintentional discrete charges in a nominally undoped channel of a thin body double gate MOSFETS: Classical to full quantum simulation," ser. New Phenomena in Mesoscopic Structures - 7 (NPMS) and the fifth in the series of Surfaces and Interfaces of Mesoscopic Devices (SIMD), NPMS-7/ SIMD-5,
  • A. Martinez, A. Svizhenko, M. P. Anantram, J. R. Barker, A. R. Brown, B. Biegel and A. Asenov, "Impact of stray charges on the characteristics of nano-DGMOSFETs in the ballistic regime: A NEGF simulation study," ser. Silicon Nanoelectronics Workshop 2005, pp. 76–77.
  • A. Martinez, A. Svizhenko, M. P. Anantram, J. R. Barker, A. R. Brown and A. Asenov, "A study of the effect of interface roughness on a DG-MOSFET using full 2D NEGF technique," in Proc. IEDM 2005 Tech. Dig. pp. 627-630,
  • C. Millar, A. Asenov and S. Roy, "Self-consistent particle simulation of ion channels," Journal of Computational and Theoretical Nanoscience, Vol. 2, No. 1, pp. 56–67, 2005.
  • C. Millar, A. Asenov, S. Roy and A. R. Brown, "Simulating the bio-nano-CMOS interface," ser. 5th IEEE conference on Nanotechnology, Nagoya, Japan,
  • C. Millar and A. Asenov, "P3M Simulation of Biological Ion Channels," in Handbook of Theoretical and Computational Nanotechnology. American Scientific Publishers, 2005,
  • C. Millar, A. Asenov, A. R. Brown and S. Roy, "Tracking the propagation of individual ions through nano-MOSFETs," J. Computational Electronics, Vol. 4, No. 1-2, pp. 185–188, Apr. 2005.
  • C. Millar, A. Asenov and S. Roy, "Simulating Ion Channels and their Nano-CMOS Interface," in Proc. U.K.-Korea Joint Symposium on Bio-Technology, Feb.
  • C. Riddet, A. R. Brown, C. L. Alexander, J. R. Watling, S. Roy and A. Asenov, "Impact of quantum confinement scattering on the magnitude of current fluctuations in double gate MOSFETs," ser. Silicon Nanoelectronics Workshop 2005,
  • G. Roy, F. Adamu-Lema, A. R. Brown, S. Roy and A. Asenov, "Simulation of combined sources of intrinsic parameter fluctuations in 'real' 35nm MOSFET," ser. European Solid-State Device Research Conference 2005 - ESSDERC2005, Grenoble, France,
  • G. Roy, F. Adamu-Lema, A. R. Brown, S. Roy and A. Asenov, "Intrinsic parameter fluctuations in conventional MOSFETs until the end of the ITRS," ser. New Phenomena in Mesoscopic Structures - 7 (NPMS) and the fifth in the series of Surfaces and Interfaces of Mesoscopic Devices (SIMD), NPMS-7/ SIMD-5,
  • S. Roy and A. Asenov, "Where do the dopants go?" Science, Vol. 309, No. 5733, pp. 388–390, 2005.
  • K. Samsudin, B. Cheng, A. R. Brown, S. Roy and A. Asenov, "Impact of random dopant induced fluctuations on sub-15nm UTB SOI 6T SRAM cells," 2005 IEEE International SOI Conference, Proceedings, pp. 61–62, 2005.
  • K. Samsudin, B. Cheng, A. R. Brown, S. Roy and A. Asenov, "UTB SOI SRAM cell stability under the influence of intrinsic parameter fluctuation," ser. European Solid-State Device Research Conference 2005 - ESSDERC2005, Grenoble, France, pp. 553–556.
  • K. Samsudin, B. Cheng, A. R. Brown, S. Roy and A. Asenov, "Impact of body thickness fluctuation in nanometre scale UTB SOI MOSFETs on SRAM cell functionality," in Proc. 6th European Conference on Ultimate Integration of Silicon (ULIS05), Apr.
  • N. Seoane, A. J. Garcia-Loureiro, K. Kalna and A. Asenov, "Indium content fluctuations in the channel of a 120nm PHEMT," ser. New Phenomena in Mesoscopic Structures - 7 (NPMS) and the fifth in the series of Surfaces and Interfaces of Mesoscopic Devices (SIMD), NPMS-7/ SIMD-5,
  • N. Seoane, A. J. Garcia-Loureiro, K. Kalna and A. Asenov, "Discrete doping fluctuations in the delta layer of a 50nm InP HEMT," ser. MSED 2005 Modeling and Simulation of Electron Devices,
  • N. Seoane, A. J. Garcia-Loureiro, K. Kalna and A. Asenov, "A high performance parallel device simulator for high electron mobility transistors," ser. Parallel Computing 2005,
  • N. Seoane, A. J. Garcia-Loureiro, K. Kalna and A. Asenov, "Discrete doping fluctuations in the delta layer of a 50 nm InP HEMT," in Proc. Proc. Modeling and Simulation of Electron Devices, July pp. 78–79.
  • J. R. Watling, L. Yang, A. Asenov, J. R. Barker and S. Roy, "Impact of high-k dielectric HfO2 on the mobility and device performance of sub-100-nm nMOSFETs," IEEE Transactions on Device and Materials Reliability, Vol. 5, No. 1, pp. 103–108, 2005.
  • J. R. Watling, A. R. Brown, C. L. Alexander, G. Ferrari, J. R. Barker, G. Bersuker, P. Zeitzoff and A. Asenov, "Electrostatic and transport variations in nano CMOS devices due to variations in high-k oxides," ser. 2nd International Workshop on Advanced Gate Stack Technology, Texas, USA,
  • J. R. Watling, A. Asenov, J. R. Barker and S. Roy, "The impact of the interfacial layer and structure of the k dielectric (HfO2) on device performance," ser. Advanced Gate Stack Engineering Conference,
  • J. R. Watling, A. Asenov, J. R. Barker and S. Roy, "Transport in the presence of high-k dielectrics," ser. Material Modelling International Workshop,
  • L. Yang, J. R. Watling, J. R. Barker and A. Asenov, "The impact of soft-optical phonon scattering due to high-kappa dielectrics on the performance of sub-100nm conventional and strained Si n-MOSFETs," ser. PHYSICS OF SEMICONDUCTORS Aip conference proceedings, MELVILLE, pp. 1497–1498.
  • L. Yang, J. R. Watling, F. Adamu-Lema and A. Asenov, "Simulations of Sub-100 nm Strained Si MOSFETs with High-k Gate Stacks," Computational Electronics, Vol. 3, pp. 171–176, 2005.

2004

  • F. Adamu-Lema, S. Roy, A. R. Brown, A. Asenov and G. Roy, "Intrinsic parameter fluctuations in conventional MOSFETs at the scaling limit: a statistical study," in Proc. 10th International Workshop on Computational Electronics (IWCE), West Lafayette, IN, USA, Oct. 24-27, 2004, pp. 44–45.
  • F. Adamu-Lema, G. Roy, A. R. Brown, A. Asenov and S. Roy, "Intrinsic parameter fluctuations in conventional MOSFETs at the scaling limit:a statistical study," J. Computational Electronics, Vol. 3, pp. 203–206, 2004.
  • C. L. Alexander, J. R. Watling and A. Asenov, "Numerical carrier heating when implementing (PM)-M-3 to study small volume variations," Semiconductor Science and Technology, Vol. 19, No. 4, p. S139–S141, 2004.
  • C. L. Alexander, A. R. Brown, J. R. Watling and A. Asenov, "Impact of scattering on random dopant induced current fluctuations in decanano MOSFETs," in Proc. SISPAD, ser. Simulation of Semiconductor Processes and Devices, pp. 223–226.
  • C. L. Alexander, A. R. Brown, J. R. Watling and A. Asenov, "Impact scattering in 'atomistic' device simulation," in Proc. Ultimate Intigration of Silicon, ser. 5th European Workshop on Ultimate Integration of Silicon - ULIS04,
  • C. L. Alexander, A. R. Brown, J. R. Watling and A. Asenov, "Impact of single charge trapping in nano-MOSFETs," in Proc. Silicon Nanoelectronics Workshop, ser. IEEE 2004 Silicon Nanoelectronics Workshop, Honolulu,
  • C. L. Alexander, J. R. Watling and A. Asenov, "Small volume mobility variations due to lonised impurity scattering," Semiconductor Science and Technology, Vol. 10S, pp. 139–141, 2004.
  • C. L. Alexander, A. R. Brown, J. R. Watling and A. Asenov, "Impact of scattering in 'atomistic' device simulation," in Proc. Proc. ULIS 2004, Leuven Belgium, pp. 89–92.
  • A. Asenov, G. Roy, C. L. Alexander, A. R. Brown, J. R. Watling and S. Roy, "Quantum mechanical and transport aspects of resolving discrete charges in nano-CMOS device simulation," in Proc. 4th IEEE Conference on Nanotechnology (IEEE Nano), Munich, Germany, Aug. 17-19, 2004, pp. 334–336.
  • A. Asenov and K. Kalna, "Scaling the HEMT to sub-100nm dimensions: a simulation study," in Proc. Proceedings of Asian Pacific Microwave Conference APMC'04,
  • A. Asenov, A. R. Brown and S. Kaya, "Atomistic Simulation of Decanano MOSFETs," in Predictive Simulation of Semiconductor Processing: Status and Challenges, J. Dabrowski and E. R. Weber, Eds. Berlin: Springer, 2004, pp. 111–156.
  • M. Boriçi, J. R. Watling, R. C. W. Wilkins, L. Yang, J. R. Barker and A. Asenov, "Interface roughness scattering and its impact on electron transport in relaxed and strained Si n-MOSFETs," Semiconductor Science and Technology, Vol. 19S, No. 4, pp. 155–157, 2004.
  • B. Cheng, S. Roy and A. Asenov, "The impact of random dopant effects on SRAM cells," ser. 30th European Solid-State Circuits Confernece ESSCIRC 2004, pp. 219–222.
  • B. Cheng, S. Roy and A. Asenov, "Compact model strategy for studying the impact of intrinsic parameter fluctuations on circuit performance," ser. 11th International Conference Mixed Design of Integrated Circuits and Systems, pp. 51–55.
  • K. Kalna and A. Asenov, "Role of multiple delta doping in PHEMTs scaled to sub-100 nm dimensions," Solid-State Electronics, Vol. 48, No. 7, pp. 1223–1232, 2004.
  • K. Kalna, M. Boriçi, L. Yang and A. Asenov, "Monte Carlo simulations of III-V MOSFETs," Semiconductor Science and Technology, Vol. 19, No. 4, p. S202–S205, 2004.
  • K. Kalna, L. Yang, J. R. Watling and A. Asenov, "80nm InGaAs MOSFET compared to equivalent Si transistor," ser. 5th European Workshop on Ultimate Integration of Silicon - ULIS04, pp. 159–162.
  • A. Lee, A. R. Brown, A. Asenov and S. Roy, "RTS amplitudes in decanano n-MOSFETs with conventional and high- k gate stacks," ser. Conference on Solid State Devices and Materials - SSDM 2004,
  • A. Lee, A. R. Brown, A. Asenov and S. Roy, "RTS amplitudes in decanano n-MOSFETs with conventional and high-k gate stacks," J. Computational Electronics, Vol. 3, pp. 247–250, 2004.
  • A. Lee, A. R. Brown, A. Asenov and S. Roy, "RTS amplitudes in decanano n-MOSFETs with conventional and high-k gate stacks," in Proc. International Workshop on Computational Electronics (IWCE 10), Oct. pp. 159–160.
  • C. Millar, A. Asenov, A. R. Brown and S. Roy, "Tracking the propagation of individual ions through ion channels with nano-MOSFETs," in Proc. 10th International Workshop on Computational Electronics (IWCE), ser. International workshop on Computational Electronics, IWCE-10, West Lafayette, IN, USA, Oct. 24-27, 2004, pp. 205–206.
  • C. Riddet, A. R. Brown, C. L. Alexander, J. R. Watling, S. Roy and A. Asenov, "Scattering from body thickness fluctuations in double gate MOSFETs. An ab initio Monte Carlo simulation study," ser. International workshop on Computational Electronics, IWCE-10, West Lafayette, USA, pp. 194–195.
  • C. Riddet, A. R. Brown, C. L. Alexander, J. R. Watling, S. Roy and A. Asenov, "Scattering From Body Thickness Fluctuations in Double Gate MOSFETs. An ab initio Monte Carlo Study." J. Comp. Elec, Vol. 3, pp. 341–345, 2004.
  • J. R. Watling, L. Yang, M. Boriçi, R. C. W. Wilkins, A. Asenov, J. R. Barker and S. Roy, "The impact of interface roughness scattering and degeneracy in relaxed and strained Si n-channel MOSFETs," Solid-State Electronics, Vol. 48, No. 8, pp. 1337–1346, 2004.
  • J. R. Watling, L. Yang, J. R. Barker and A. Asenov, "The impact of high- k dielectrics on the future performance of nano-scale MOSFETs," ser. IoP Condensed Matter and Materials Physics Conference CMMP04, Warwick, UK,
  • J. R. Watling, L. Yang, A. Asenov, J. R. Barker and S. Roy, "Impact of high- k dielectric HfO2 on the mobility and device performance of sub-100nm n-MOSFETs," ser. International workshop on electrical characterization and reliability of high- k devices, Austin, USA,
  • L. Yang, A. Asenov, J. R. Watling, M. Boriçi, J. R. Barker, S. Roy, K. Elgaid, I. G. Thayne and T. Hackbarth, "Impact of device geometry and doping strategy on linearity and RF performance in Si/SiGe MODFETs," Microelectronics Reliability, Vol. 44, No. 7, pp. 1101–1107, 2004.
  • L. Yang, J. R. Watling, A. Asenov and J. R. Barker, "Performance degradation due to soft optical phonon scattering in conventional and strained Si MOSFETs with high-k gate dielectrics," ser. 34th European Solid-State Device research Conference, ESSDERC,
  • L. Yang, J. R. Watling, A. Asenov, J. R. Barker and S. Roy, "Mobility and device performance in conventional and strained Si MOSFETs with high-k stack," ser. International Conference on Simulation of Semiconductor Processes and Devices, SISPAD, pp. 199–202.
  • L. Yang, J. R. Watling, R. C. W. Wilkins, J. R. Barker and A. Asenov, "Reduced interface roughness in sub-100nm strained Si n-MOSFETs - A Monte Carlo simulation study," ser. 5th European Workshop on Ultimate Integration of Silicon - ULIS04, pp. 23–26.
  • L. Yang, J. R. Watling, R. C. W. Wilkins, J. R. Barker and A. Asenov, "Monte-Carlo investigation of interface roughness scattering in relaxed and strained Si n-MOSFETs," ser. Condensed Matter and Materials Physcis Conference - CMMP04, Warwick, UK,
  • L. Yang, J. R. Watling, F. Adamu-Lema, A. Asenov and J. R. Barker, "Simulations of sub-100nm strained Si MOSFETs with high k gate stacks," ser. International workshop on Computational Electronics, IWCE-10, West Lafeyette, USA,
  • L. Yang, J. R. Watling, A. Asenov, J. R. Barker and S. Roy, "Sub-100nm strained Si CMOS: Device performance and circuit behavior," ser. 7th International Conference on Solid State and Intergrated Circuit Technology,
  • L. Yang, J. R. Watling, R. C. W. Wilkins, M. Boriçi, J. R. Barker, A. Asenov and S. Roy, "Si/SiGe heterostructure parameters for device simulations," Semiconductor Science and Technology, Vol. 19, No. 10, pp. 1174–1182, 2004.
  • L. Yang, J. R. Watling, J. R. Barker and A. Asenov, "The impact of soft-optical phonon scattering due to high-κ dielectrics on the performance of sub-100nm conventional and strained Si n-MOSFETs," in Proc. 27th International Conference on Physics of Semiconductors (ICPS04), July.
  • L. Yang, J. R. Watling, F. Adamu-Lema, A. Asenov and J. R. Barker, "Scaling study of Si and strained Si n-MOSFETs with different high-k gate stacks," in Proc. 2004 International Electron Device Meeting (IEDM), Dec.
  • L. Yang, J. R. Watling, A. Asenov, J. R. Barker and S. Roy, "Device performance in conventional and strained Si MOSFETs with high-κ gate stack," in Proc. IEEE International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Sept.

2003

  • C. L. Alexander, J. R. Watling and A. Asenov, "Artificial carrier heating due to the introduction of ab-initio Coulomb scattering in Monte Carlo simulations," in Proc. Sixth International Conference on New Phenomena in Mesoscopic Systems, and Fourth International Conference on Surfaces and Interfaces of Mesoscopic Devices (NPMS-6/SIMD-4),
  • C. L. Alexander, J. R. Watling and A. Asenov, "Small volume mobility variations due to ionised impurity scattering," in Proc. Internation Conference on Nonequilibrium Dynamics in Semiconductors, ser. 13th International Conference on Nonequilibrium Carrier Dynamics - HCIS 13,
  • C. L. Alexander, J. R. Watling and A. Asenov, "Mobility variations in ultra-small devices due to discrete charges." J. Computational Electronics, Vol. 2, pp. 285–289, 2003.
  • C. L. Alexander, A. R. Brown, J. R. Watling and A. Asenov, "Artificial carrier heating due to the introduction of ab-initio Coulomb scattering in Monte Carlo simulations." Superlattices and Microstructures, Vol. 34, No. 3-6, pp. 319–326, 2003.
  • C. L. Alexander, J. R. Watling and A. Asenov, "Mobility variations in ultra-small devices due to discrete charges," in Proc. Extended Abstracts IWCE-9, Rome 2003,
  • A. Asenov, A. R. Brown, J. H. Davies, S. Kaya and G. M. Slavcheva, "Simulation of intrinsic parameter fluctuations in decananometer and nanometer-scale MOSFETs," IEEE Transactions on Electron Devices, Vol. 50, No. 9, pp. 1837–1852, 2003.
  • A. Asenov, S. Kaya and A. R. Brown, "Intrinsic parameter fluctuations in decananometer MOSFETs introduced by gate line edge roughness," IEEE Transactions on Electron Devices, Vol. 50, No. 5, pp. 1254–1260, 2003.
  • A. Asenov, R. Balasubramaniam, A. R. Brown and J. H. Davies, "RTS amplitudes in decananometer MOSFETs: 3-D Simulation Study," IEEE Transactions on Electron Devices, Vol. 50, No. 3, pp. 839–845, 2003.
  • A. Asenov, A. R. Brown and J. R. Watling, "Quantum corrections in the simulation of decanano MOSFETs," Solid-State Electronics, Vol. 47, No. 7, pp. 1141–1145, 2003.
  • A. Asenov, "Brownian approach to simulation of ionic solutions and ion permeation through protein channels," ser. IVth International Association for Mathematics and Computers in Simulation - IMACS Seminar on Monte Carlo Methods,
  • A. Asenov, "Modeling end-of-the roadmap transistors," ser. 203rd Electrochemical Society (ECS) Meeting, p. 974.
  • A. Asenov, A. R. Brown, J. H. Davies, S. Kaya and G. M. Slavcheva, "Simulation of Intrinsic Parameter Fluctuations in Decananometre and Nanometre scale MOSFET's." IEEE Trans. Electron Dev. Vol. 50, pp. 1837–1852, 2003.
  • A. Asenov, J. R. Watling, A. R. Brown and D. K. Ferry, "The Use of Quantum Potentials for Confinement and Tunnelling in Semiconductor Devices," J. Computational Electronics, Vol. 1, pp. 503–513, 2003.
  • A. R. Brown, F. Adamu-Lema and A. Asenov, "Intrinsic parameter fluctuations in nanometer scale thin body SOI devices introduced by interface roughness," in Proc. Sixth International Conference on New Phenomena in Mesoscopic Systems, and Fourth International Conference on Surfaces and Interfaces of Mesoscopic Devices (NPMS-6/SIMD-4), Maui, HI, USA, Nov. 30-Dec. 5, 2003, pp. 32–33.
  • A. R. Brown, F. Adamu-Lema and A. Asenov, "Intrinsic parameter fluctuations in UTB MOSFETs induced by body thickness variations," in Proc. Silicon Nanoelectronics Workshop, Kyoto, Japan, June 8-9, 2003,
  • A. R. Brown, F. Adamu-Lema and A. Asenov, "Intrinsic Parameter Fluctuations in Nanometre Scale Thin-body SOI Devices Introduced by Interface Roughness," Superlattices and Microstructures, Vol. 34, No. 3-6, pp. 283–291, 2003.
  • B. Cheng, S. Roy, G. Roy and A. Asenov, "Integrating 'atomistic' intrinsic parameter fluctuations into compact model circuit analysis," ser. ESSDERC 2003 - European Solid-State Device Research Conference, pp. 437–440.
  • A. J. Garcia-Loureiro, K. Kalna, A. Asenov, R. C. W. Wilkins and J. M. Lopez-Gonzalez, "Statistic 3D simulation of intrinsic fluctuations in nanoscaled PHEMTs," ser. 14th Workshop on Modeling and Simulation of Electron Devices, pp. 45–48.
  • A. J. Garcia-Loureiro, K. Kalna and A. Asenov, "3D Parallel simulation of fluctuations effects on pHEMTs," Journal of Computational Electronics, Vol. 2, pp. 369–373, 2003.
  • K. Kalna and A. Asenov, "Gate tunnelling and impact ionisation in sub 100nm PHEMTs," The Institute of Electronics, Information and Communication Engineers IEICE Transactions on Electronics, Vol. E86-C, pp. 330–335, 2003.
  • K. Kalna and A. Asenov, "Nonequilibrium and ballistic transport, and backscattering in decanano MOSFET's: A Monte Carlo simulation study," Mathematics and Computers in Simulation, Vol. 62, pp. 357–366, 2003.
  • K. Kalna, M. Boriçi, L. Yang and A. Asenov, "Monte Carlo simulation of III-V MOSFETs," ser. 13th International Conference on Nonequilibrium Carrier Dynamics - HCIS 13,
  • K. Kalna, L. Yang and A. Asenov, "Simulation study of high performance III-V MOSFETs for digital applications," ser. International Workshop on Computational Electronics - IWCE 9,
  • K. Kalna, L. Yang and A. Asenov, "Simulation study of high performance III-V MOSFETs for digital applications," Journal of Computational Electronics, Vol. 2, pp. 341–345, 2003.
  • S. Kaya, W. Ma and A. Asenov, "Design of DG-MOSFETs for high linearity performance," ser. 2003 IEEE International SOI Conference, Athens, Ohio, USA, pp. 68–69.
  • A. Lee, A. R. Brown, A. Asenov and S. Roy, "RTS noise simulations of decanano MOSFETs subject to atomic scale structure variations," ser. NPMS-6/SIMD-4 Sixth International Conference on New Phenomena in Mesoscopic Systems, and Fourth International Conference on Surfaces and Interfaces of Mesoscopic Devices, Maui, Hawaii,
  • A. Lee, A. R. Brown, A. Asenov and S. Roy, "RTS noise simulations of decanano MOSFET's subject to atomic scale structure variations." Superlattices and Microstructures, Vol. 34, No. 3-6, 2003.
  • W. Ma, S. Kaya and A. Asenov, "Study of RF linearity in sub-50nm MOSFETs using simulations," Journal of Computational Electronics, Vol. 2, pp. 347–352, 2003.
  • W. Ma, S. Kaya and A. Asenov, "Scaling of RF Linearity in DG and SOI MOSFETs," in Proc. EDMO 2003,
  • W. Ma, S. Kaya and A. Asenov, "Study of RF linearity in sub-50 nm MOSFETs using simulations," in Proc. Extended abstracts of the International Workshop on Computational Electronics IWCE-9,
  • C. Millar, A. Asenov and S. Roy, "Brownian ionic channel simulation," in Proc. International Workshop on Computational Electronics, Champaign Urbana, USA,
  • C. Millar, A. Asenov and S. Roy, "Brownian dynamics based particle mesh simulation of ionic solutions and channels," ser. Proceedings Modeling and Simulation of Microsystems 2003 - MSM 03,
  • C. Millar, A. Asenov and S. Roy, "Brownian ionic channel simulation," Journal of Computational Electronics, Vol. 2, pp. 257–262, 2003.
  • C. Millar and A. Asenov, "Modelling Ion Channels: The Engineers Approach," in Proc. IOP Electrostatics 2003, Abstracts, Mar.
  • C. Millar, A. Asenov and S. Roy, "Brownian Dynamics Based Simulation Of Ionic Solutions And Channels," in Proc. Nanotech 2003: Technical Proceedings, Cambridge,
  • D. A. J. Moran, K. Kalna, E. Boyd, F. McEwan, H. McLelland, L. L. Zhuang, C. R. Stanley, A. Asenov and I. G. Thayne, "Self-aligned 0.12 μm T-gate In.53Ga.47As/In.52Ga.48As technology using a non-annealed ohmic contact strategy," in Proc. Proceedings of ESSDERC 2003, pp. 315–318.
  • G. Roy, A. R. Brown, A. Asenov and S. Roy, "Bipolar quantum corrections in resolving individual dopants in atomistic, intrinsic parameter fluctuations into compact model circuit analysis," ser. NPMS-6/SIMD-4 Sixth International Conference on New Phenomena in Mesoscopic Systems, and Fourth International Conference on Surfaces and Interfaces of Mesoscopic Devices, Maui, Hawaii, pp. 34–35.
  • G. Roy, A. R. Brown, A. Asenov and S. Roy, "Quantum aspects of resolving discrete charges in atomistic device simulation," Journal of Computational Electronics, Vol. 2, pp. 323–327, 2003.
  • G. Roy, A. R. Brown, A. Asenov and S. Roy, "Bipolar quantum corrections in resolving individual dopants in 'atomistic' device simulations," Superlattices and Microstructures, Vol. 34, No. 3-6, pp. 327–334, 2003.
  • G. Roy, A. R. Brown, A. Asenov and S. Roy, "Quantum aspects of resolving discrete charges in “atomistic” device simulation," in Proc. Extended abstracts of the International Workshop on Computational Electronics IWCE-9,
  • S. Roy, A. Lee, A. R. Brown and A. Asenov, "Application of quasi-3D and 3D MOSFET simulations in the atomistic regime," ser. International Workshop on Computational Electronics - IWCE 9,
  • S. Roy, B. Cheng, G. Roy and A. Asenov, "A methodology for introducing atomistic parameter fluctuations into compact device models for circuit simulation," Journal of Computational Electronics, Vol. 2, pp. 427–431, 2003.
  • S. Roy, A. Lee, A. R. Brown and A. Asenov, "Application of quasi-3D and 3D MOSFET simulations in the atomistic regime," Journal of Computational Electronics, Vol. 2, pp. 423–426, 2003.
  • S. Roy, B. Cheng, G. Roy and A. Asenov, "A methodology for introducing “atomistic” parameter fluctuations into compact device models for circuit simulation," in Proc. Extended abstracts of the International Workshop on Computational Electronics IWCE-9,
  • J. R. Watling, L. Yang, M. Boriçi, J. R. Barker and A. Asenov, "Degeneracy and high doping effects in deep sub-micron relaxed and strained SiGe MOSFETs," Journal of Computational Electronics, Vol. 2, pp. 475–479, 2003.
  • J. R. Watling, A. Asenov, A. R. Brown, A. Svizhenko and M. P. Anantram, "Direct Source-to-Drain Tunnelling and its Impact on the Intrinsic Parameter Fluctuations in nanometre scale Double Gate MOSFETs," in Proc. Proc. Modeling and Simulation of Microsystems (MSM03), p. 202.
  • L. Yang, J. R. Watling, M. Boriçi, R. C. W. Wilkins, A. Asenov, J. R. Barker and S. Roy, "Simulations of scaled sub-100nm strained Si/SiGe p-channel MOSFETs," Journal of Computational Electronics, Vol. 2, pp. 363–368, 2003.
  • L. Yang, A. Asenov, J. R. Watling, M. Boriçi, J. R. Barker, S. Roy, K. Elgaid, I. G. Thayne and T. Hackbarth, "Optimisation of sub 11nm Si/SiGe MODFETs for high linearity applications," ser. 14th Workshop on Modeling and Simulation of Electron Devices, pp. 41–44.
  • L. Yang, A. Asenov, J. R. Watling, M. Boriçi, J. R. Barker, S. Roy, K. Elgaid, I. G. Thayne and T. Hackbarth, "Optimizations of sub-100nm Si/SiGe MODFETs for high linearity RF applications," in Proc. Proceedings of the 2003 IEEE Conference on Electron Device and Solid-State Circuits (EDSSC03), Dec. pp. 331–334.
  • L. Yang, J. R. Watling, M. Boriçi, R. C. W. Wilkins, A. Asenov, J. R. Barker and S. Roy, "Simulations of scaled sub-100nm strained Si/SiGe p-channel MOSFETs," in Proc. 9th IEEE International Workshop of Computational Electronics (IWCE),
  • L. Yang, A. Asenov, J. R. Watling, M. Boriçi, J. R. Barker, S. Roy, K. Elgaid, I. G. Thayne and T. Hackbarth, "A simulation study of high linearity Si/SiGe HFETs," in Proc. Proceedings of the 14th Workshop on Modelling and Simulation of Electron Device (MSED03), Oct. pp. 41–44.

2002

  • A. Asenov, S. Kaya and J. H. Davies, "Intrinsic threshold voltage fluctuations in decanano MOSFETs due to local oxide thickness variations," IEEE Transactions on Electron Devices, Vol. 49, pp. 112–119, 2002.
  • A. Asenov, S. Kaya and A. R. Brown, "Implications of Imperfect Interfaces and edges in Ultra-small MOSFET characteristics," Physica Status Solidi B, Vol. 233, No. 1, pp. 101–112, 2002.
  • A. Asenov, M. Jaraiz, S. Roy, G. Roy, F. Adamu-Lema, A. R. Brown, V. Moroz and R. Gafiteanu, "Integrated atomistic process and device simulation of decananometre MOSFETs," in Proc. Simulation of Semiconductor Processes and Devices, Kobe, Japan, Sept. 4-6, 2002, pp. 87–90.
  • A. Asenov, A. R. Brown and J. R. Watling, "Quantum corrections in the simulation of decanano MOSFETs," in Proc. 3rd European Workshop on Ultimate Integration of Silicon (ULIS), Munich, Germany, 2002,
  • A. Asenov, A. R. Brown and J. R. Watling, "The Use of Quantum Potentials for Confinement in Semiconductor Devices," in Proc. 5th International Conference on Modeling and Simulation of Microsystems (MSM), Puerto Rico, Apr. 20-25, 2002,
  • A. Asenov, "Simulation of intrinsic fluctuations in decanano MOSFETs: present status and future challenges," in Proc. Proc. Solid State Devices and Materials (SSDM 2002),
  • A. R. Brown, J. R. Watling and A. Asenov, "A 3-D atomistic study of archetypal double gate MOSFET structures," Journal of Computational Electronics, Vol. 1, pp. 165–169, 2002.
  • A. R. Brown, A. Asenov and J. R. Watling, "Intrinsic Fluctuations in Sub 10 nm Double-Gate MOSFETs Introduced by Discreteness of Charge and Matter," IEEE Trans. Nanotechnology, Vol. 1, pp. 195–200, 2002.
  • A. R. Brown, A. Asenov and J. R. Watling, "Intrinsic Fluctuations in Sub 10 nm Double-Gate MOSFETs Introduced by Discreteness of Charge and Matter," in Proc. Silicon Nanoelectronics Workshop, Honolulu, HI, USA, June 9-10, 2002,
  • K. Kalna and A. Asenov, "Nonequilibrium transport in scaled high electron mobility transistors," Semiconductor Science and Technology, Vol. 17, pp. 579–584, 2002.
  • K. Kalna, S. Roy, A. Asenov, K. Elgaid and I. G. Thayne, "Scaling of pseudomorphic high electron mobility transistors to decanano dimensions," Solid State Electronics, Vol. 46, No. 5, pp. 631–638, 2002.
  • K. Kalna and A. Asenov, "Quantum corrections in the Monte Carlo simulations of scaled PHEMTs with multiple delta doping," Journal of Computational Electronics, Vol. 1, pp. 257–261, 2002.
  • K. Kalna and A. Asenov, "Nonequilibrium and ballistic transport, and backscattering in decanano HEMTs: A Monte Carlo simulation study," Mathematics and Computers in Simulation, 2002.
  • K. Kalna and A. Asenov, "Tunneling and impact ionization in scaled double doped PHEMTs," ser. Proceedings of 32nd European Solid State Device Research Conference, pp. 303–306.
  • K. Kalna, L. Yang and A. Asenov, "High performance III-V MOSFETs: a dream close to reality?" ser. 10th International Symposium on Electron Devices for Microwave and Optoelectronic Devices, Manchester, UK, pp. 243–248.
  • K. Kalna and A. Asenov, "Breakdown mechanisms limiting the operation of double doped PHEMTs scaled into sub-100nm dimensions," ser. Proceedings 4th International Conference on Advanced Semiconductor Devices and Microsystems (ASDAM 2002 ), pp. 141–144.
  • K. Kalna and A. Asenov, "Ballistic transport in decanano MOSFETs: Present status and future challenges," ser. Proceesings of Workshop on Physical Simulation of Semiconductor Devices -13, pp. 1–5.
  • K. Kalna and A. Asenov, "Monte Carlo modelling of first order quantum effects in deep submicron HEMTs," ser. Neumann Institute for Computing winter school on Quantum simulations of complex many-body systems,
  • K. Kalna and A. Asenov, "Gate tunnelling and impact ionisation in sub 100 nm PHEMTs," in Proc. Proceedings of SISPAD2002, pp. 139–142.
  • K. Kalna and A. Asenov, "Balllistic transport in decanano PHEMTs," in Proc. Proceeding of 13th Workshop on Physical Simulation of Semiconductor Devices, pp. 1–5.
  • S. Kaya, A. Asenov and S. Roy, "On the breakdown of universal mobility curves: a Brownian 3D simulation study," J. Computational Electronics, Vol. 1, pp. 375–379, 2002.
  • S. Kaya, A. Asenov and S. Roy, "Breakdown of universal mobility curves in sub-100nm MOSFETs," IEEE Trans. Nanotechnology, Vol. 1, pp. 260–264, 2002.
  • S. Kaya, A. Asenov and S. Roy, "Breakdown of universal mobility curves in sub-100 nm MOSFETs," in Proc. Proceedings of the Silicon Nanoelectronics Workshop,
  • C. Millar, A. Asenov and J. R. Watling, "Excessive Over-Relaxation Method For Multigrid Poisson Solvers," J. Computational Electronics, Vol. 1, No. 3, pp. 341–345, 2002.
  • C. Millar, A. Asenov and S. Roy, "A Generic Particle-Mesh Framework For The Simulation Of Ionic Channels," J. Computational Electronics, Vol. 1, No. 3, pp. 405–409, 2002.
  • C. Millar and A. Asenov, "Multiscale Particle-Mesh Ion Channel Simulations," in Proc. Workshop on Ion Channels,
  • M. J. Prest, M. J. Palmer, T. J. Grasby, P. J. Phillips, O. A. Mironov, E. H. C. Parker, T. E. Whall, A. M. Waite, A. G. R. Evans, J. R. Watling, A. Asenov and J. R. Barker, "Transconductance, carrier mobility and 1/f noise in Si/Si/sub 0.64/Ge/sub 0.36//Si pMOSFETs," Materials Science & Engineering B Solid.State.Materials for.Advanced.Technology, Vol. B89, pp. 1–3, 2002.
  • G. M. Slavcheva, J. H. Davies, A. R. Brown and A. Asenov, "Potential fluctuations in metal-oxide-semiconductor field-effect transistors generated by random impurities in the depletion layer," Journal of Applied Physics, Vol. 91, pp. 4326–4334, 2002.
  • G. M. Slavcheva, J. H. Davies, A. R. Brown and A. Asenov, "Statistics of the random potential fluctuations in the MOSFET channel," in Proc. 26th International Conference on Physics of Semiconductors, ser. 26th International Conference on Physics of Semiconductors, Edinburgh, UK, June 29-Aug. 3, 2002,
  • G. M. Slavcheva, J. H. Davies, A. R. Brown and A. Asenov, "Potential fluctuations in MOSFET's generated by randomly distributed impurities in the depletion layer." Journal of Applied Physics, Vol. 91, pp. 4326–4334, 2002.
  • H. Unlu and A. Asenov, "Band offsets in III-nitride heterostructures," Journal of Physics D :Applied Physics, Vol. 35, pp. 591–594, 2002.
  • J. R. Watling, A. R. Brown and A. Asenov, "Can the density gradient approach describe the source-drain tunnelling in decanano double-gate MOSFETs?" J. Computational Electronics, Vol. 1, pp. 289–293, 2002.
  • J. R. Watling, A. R. Brown, A. Asenov, A. Svizhenko and M. P. Anantram, "Simulation of Direct Source-to-Drain Tunnelling Using the Density Gradient Formalism: Non-equilibrium Green's Function Calibration," in Proc. Proc. SISPAD 2002, IEEE Cat. no. 02TH8621, pp. 267–270.
  • L. Yang, J. R. Watling, R. C. W. Wilkins, A. Asenov, J. R. Barker, S. Roy and T. Hackbarth, "Scaling study of Si/SiGe MOSFETs for RF applications," ser. 10th International Symposium on Electron Devices for Microwave and Optoelectronic Devices ( EDMO 2002), Manchester, UK, pp. 101–106.

2001

  • A. Asenov, "Quantum corrections to the `atomistic' MOSFET simulation,".
  • A. Asenov, G. M. Slavcheva, A. R. Brown, J. H. Davies and S. Saini, "Quantum enhancement of the random dopant induced threshold voltage fluctuations in sub 100nm MOSFETs: A 3-D density-gradient simulation study," IEEE Transactions on Electron Devices, Vol. 48, No. 4, pp. 722–729, 2001.
  • A. Asenov, "3D statistical simulation of intrinsic fluctuations in decanano MOSFETS induced by discrete dopants, oxide thickness fluctuations and LER," ser. Simulation of Semiconductor Processes and Devices, Vienna, pp. 162–169.
  • A. Asenov, "Quantum correction to the 'atomistic' MOSFET simulation." VLSI Design, Vol. 13, pp. 15–21, 2001.
  • A. R. Brown, J. R. Watling and A. Asenov, "A 3-D atomistic study of archetypal double gate MOSFET structures," in Proc. 8th International Workshop on Computational Electronics (IWCE), Urbana-Champaign, IL, USA, Oct. 15-17, 2001,
  • A. R. Brown, S. Kaya, A. Asenov, J. H. Davies and T. Linton, "Statistical Simulation of Line Edge Roughness in Decanano MOSFETs," in Proc. Silicon Nanoelectronics Workshop, Kyoto, Japan, June 10-11, 2001,
  • K. Kalna, A. Asenov, K. Elgaid and I. G. Thayne, "Scaling of pHEMTs to decanano dimensions," VLSI Design, Vol. 13, pp. 435–439, 2001.
  • K. Kalna and A. Asenov, "Multiple delta doping in aggressively scaled PHEMTs," ser. Editions Frontiers, Nuremberg, Austria, pp. 319–322.
  • K. Kalna and A. Asenov, "Quantum corrections in Monte Carlo simulations of scaled pHEMTs with multiple delta doping," ser. IWCE-8,
  • S. Kaya, A. Asenov and S. Roy, "Breakdown of Universal Mobility Curves in sub-100nm MOSFETs," ser. IWCE-8,
  • S. Kaya, A. R. Brown, A. Asenov, D. Magot and T. Linton, "Analysis of Statistical Fluctuations Due to Line Edge Roughness in Sub-0.1μm MOSFETs," in Proc. Simulation of Semiconductor Processes and Devices (SISPAD 2001), pp. 78–81.
  • A. R. Knox, A. Asenov and A. C. Lowe, "An electron emission model for use with 3D electromagnetic finite element simulation," Solid.State.Electronics. Vol. vol.45, no.6; June 2001; p.841-51, p. 511, 2001.
  • C. Millar, A. Asenov, S. Roy and J. M. Cooper, "Generic Particle-Mesh Framework for the Simulation of Ionic Channels," in Proc. Proceedings of the International Workshop on Computational Electronics IWCE01,
  • M. J. Palmer, G. Braithwaite, T. J. Grasby, P. J. Phillips, M. J. Prest, E. H. C. Parker, T. E. Whall, C. P. Parry, A. M. Waite, A. G. R. Evans, S. Roy, J. R. Watling, S. Kaya and A. Asenov, "Effective mobilities in pseudomorphic Si/SiGe/Si p-channel metal-oxide-semiconductor field-effect transistors with thin silicon capping layers," Applied.Physics.Letters. Vol. vol.78, No. 10, pp. 1424–1426, 2001.
  • M. J. Palmer, G. Braithwaite, M. J. Prest, E. H. C. Parker, T. E. Whall, S. Zhao, S. Kaya, J. R. Watling, A. Asenov, J. R. Barker, A. M. Waite and A. G. R. Evans, "Enhanced velocity overshoot and transconductance in Si/SiGe/Si pMOSFETs- Prediction for deep submicron devices," ser. Proceeding ESSDERC 2001 - Edition Frontiers, pp. 199–202.
  • U. N. Straube, A. G. R. Evans, G. Braithwaite, S. Kaya, J. R. Watling and A. Asenov, "On the mobility extraction for HMOSFETs," Solid.State.Electronics. Vol. vol.45, No. 3, pp. 527–529, 2001.
  • J. R. Watling, A. R. Brown, A. Asenov and D. K. Ferry, "Quantum corrections in 3-D drift diffusion simulation of decanano MOSFETs using an effective potential," ser. Simulation of semiconductor processes and devices, Vienna, pp. 81–85.
  • J. R. Watling, J. R. Barker and A. Asenov, "Soft sphere model for electron correlation and scattering in the atomistic modelling of semiconductor devices," VLSI Design, Vol. 13, pp. 441–446, 2001.
  • J. R. Watling, Y. P. Zhao, A. Asenov and J. R. Barker, "Non-equilibrium hole transport in deep sub-micron Well-Tempered Si p-MOSFETs," VLSI Design, Vol. 13, pp. 169–174, 2001.

2000

  • A. Asenov, S. Kaya, J. H. Davies and S. Saini, "Oxide thickness variation induced threshold voltage fluctuations in decanano MOSFETs: a 3D density gradient simulation study," Superlattices.and.Microstructures. Vol. vol.28, no.5-6; 2000; p.507-15, p. 6, 2000.
  • A. Asenov and S. Saini, "Polysilicon Gate Enhancement of the Random Dopant Induced Threshold Voltage Fluctuations in Sub 100 nm MOSFETs with Tunnelling Oxide," IEEE Trans. Electron Dev. Vol. 47, No. 4, pp. 805–812, 2000.
  • A. Asenov, R. Balasubramaniam, A. R. Brown and J. H. Davies, "Effect of Single electron trapping in decanano MOSFETs: A 3D “atomistic” simulation study," Superlattices and Microstructures, Vol. 27, No. 5/6, pp. 411–416, 2000.
  • A. Asenov, G. M. Slavcheva, A. R. Brown, R. Balasubramaniam and J. H. Davies, "Statistical, 3D “atomistic” simulation of decanano MOSFETs," Superlattices and Microstructures, Vol. 27, No. 2/3, pp. 215–227, 2000.
  • A. Asenov, "Atomistic simulation of decanano devices," in Proc. Proceedings of ChiPPS 2000 Wandlitz, Germany,
  • A. Asenov, R. Balasubramaniam, A. R. Brown, J. H. Davies and S. Saini, "Random Telegraph Signal Amplitudes in Sub 100nm (Decanano) MOSFETs: a 3D Atomistic Simulation Study," in Proc. IEDM Tech. Digest, 2000, pp. 279–282.
  • A. Asenov, "Quantum correction to the “atomistic” MOSFET simulation," in Proc. Proceedings of the International Workshop on Computational Electronics IWCE00,
  • A. Asenov and S. Kaya, "Effect of oxide roughness on the threshold voltage fluctuations in decanano MOSFETs with ultrathin gate oxide," in Proc. Proceedings of SISPAD'00, pp. 135–138.
  • K. Kalna, A. Asenov, K. Elgaid and I. G. Thayne, "Performance of aggressively scaled pseudomorphic HEMTs: A Monte Carlo study," in Proc. Proceedings of ASDAM 2000, pp. 55–58.
  • K. Kalna, A. Asenov, K. Elgaid and I. G. Thayne, "Effect of impact ionization in scaled pHEMTs," in Proc. Proceedings of EDMO2000, pp. 236–241.
  • K. Kalna, S. Roy, A. Asenov, K. Elgaid and I. G. Thayne, "RF analysis of aggressively scaled pHEMTs," in Proc. Proceedings of ESSDERC 2000, pp. 156–159.
  • S. Kaya, Y. P. Zhao, J. R. Watling, A. Asenov, J. R. Barker, G. Ansaripour, G. Braithwaite, T. E. Whall and E. H. C. Parker, "Indication of velocity overshoot in strained Si0.8Ge.2 p-channel MOSFETs," Semiconductor Science and Technology, Vol. 15, pp. 573–578, 2000.
  • S. Roy, S. Kaya, A. Asenov and J. R. Barker, "RF analysis methodology for Si and SiGe FETs based on transient Monte Carlo simulations," IEICE Transactions on Electronics, Vol. VI. E83-C, No. 8, pp. 1224–1227, 2000.
  • J. R. Watling, J. R. Barker and A. Asenov, "Soft sphere model for electron correlation and scattering in the atomistic modelling of semiconductor devices," in Proc. Proceedings of the International Workshop on Computational Electronics IWCE00,
  • J. R. Watling, Y. P. Zhao, A. Asenov and J. R. Barker, "Non-equilibrium hole transport in deep sub-micron well-tempered Si p-MOSFETs," in Proc. Proceedings of the International Workshop on Computational Electronics IWCE00,
  • Y. P. Zhao, J. R. Watling, S. Kaya, A. Asenov and J. R. Barker, "Drift Diffusion and hydrodynamic simulations of Si/SiGe p-MOSFETs," Materials Science and Engineering (B)-Solid State Materials for Advanced Technology, Vol. 72, pp. 180–183, 2000.
  • Y. P. Zhao, S. Kaya, J. R. Watling, A. Asenov, J. R. Barker, M. J. Palmer, G. Braithwaite, T. E. Whall and E. H. C. Parker, "Indication of Non-equilibrium Transport in SiGe p-MOSFETs," in Proc. Proc. ESSDERC, pp. 224–227.

1999

  • A. Asenov, A. R. Brown, J. H. Davies and S. Saini, "Hierarchical approach to “atomistic” 3D MOSFET simulation," IEEE Trans. Computer-Aided Design of Intergrated Circuits and Systems, Vol. 18, pp. 1558–1565, 1999.
  • A. Asenov and S. Saini, "Supression of random dopant induced threshold voltage fluctuations in sub-0.1μm MOSFETs with epitaxial and delta doped channels," IEEE Trans. Electron Dev. Vol. 46, No. 8, pp. 1718–1724, 1999.
  • A. Asenov, S. Roy and J. R. Watling, "SiGe for RF applications," in Proc. IEE Colloquium Advances in Semiconductor Devices, Jan.
  • A. Asenov, "Random dopant induced threshold voltage lowering and fluctuations in sub 50 nm MOSFETs: A 3D “atomistic” simulation study," Nanotechnology, Vol. 10, pp. 153–158, 1999.
  • A. Asenov, "Hierarchical Statistical 3D 'Atomistic' Simulation of Decanano MOSFETs: Drift-Diffusion, Hydrodynamic and Quantum Mechanical Approaches," in Proc. Proceedings of 3rd NASA Device Modeling Workshop, Aug.
  • A. Asenov and S. Saini, "Influence of the Polysilicon gate on the random dopant induced threshold voltage fluctuations in sub 100 nm MOSFETs with thin gate oxides," in Proc. Proc. ESSDERC'99, pp. 188–191.
  • A. Asenov, G. M. Slavcheva, A. R. Brown and J. H. Davies, "Quantum Mechanical Enhancement of the Random Dopant Induced Threshold Voltage Fluctuations and Lowering in Sub 0.1 micron MOSFETs," in Proc. IEDM Tech. Digest, 1999, pp. 535–538.
  • S. Babiker, A. Asenov, S. Roy and S. P. Beaumont, "Strain engineered pHEMTs on virtual substrates," Solid-State Electronics, Vol. 43, pp. 1281–1288, 1999.
  • J. R. Barker and A. Asenov, "On the design and control of quantum effects in mesoscopic devices," Microelectronic Engineering, Vol. 47, pp. 255–260, 1999.
  • J. L. Pearson, M. C. Holland, C. R. Stanley, A. R. Long, E. Skuras, A. Asenov and J. H. Davies, "Optimization of layer structure for InGaAs channel pseudomorphic HEMTs," Journal of Crystal Growth, Vol. 201/202, pp. 757–760, 1999.
  • S. Roy, S. Kaya, A. Asenov and J. R. Barker, "RF analysis methodology for Si and SiGe FETs based on transient Monte Carlo simulations," in Proc. Proceedings of SISPAD'99,
  • G. Ternent, A. Asenov, I. G. Thayne, D. S. Macintyre, S. Thoms and C. D. W. Wilkinson, "SiGe p-channel MOSFET’s with a tungsten gate," IEE Electronics Letters, Vol. 35, pp. 430–431, 1999.

1998

  • C. R. Arokianathan, A. Asenov and J. H. Davies, "Mesh-based particle simulation of sub-0.1 micron FETs," Semiconductor Science and Technology, Vol. 13, No. 8A, p. A173–A176, 1998.
  • C. R. Arokianathan, J. H. Davies and A. Asenov, "Ab-initio Coulomb scattering in atomistic device simulation," VLSI Design, Vol. 8, No. 1-4, pp. 331–335, 1998.
  • C. R. Arokianathan, A. Asenov and J. H. Davies, "A new approach based on Brownian motion for the simulation of ultra-small semiconductor devices," VLSI Design, Vol. 6, No. 1-4, pp. 243–246, 1998.
  • A. Asenov, "Random dopant induced threshold voltage lowering and fluctuations in sub-0.1 μm MOSFETs: A 3D “atomistic” simulation study," IEEE Trans. Electron Dev. Vol. 45, No. 12, pp. 2505–2513, 1998.
  • A. Asenov, A. R. Brown and S. Roy, "Parallel semiconductor device simulation: from power to atomistic devices," in Proc. 6th International Workshop on Computational Electronics (IWCE), Osaka, Japan, Oct. 19-21, 1998, pp. 58–61.
  • A. Asenov, "Efficient 3D “atomistic” simulation technique for studying of random dopant induced threshold voltage lowering and fluctuations in decanano MOSFETs," in Proc. Proceedings of the International Workshop on Computational Electronics IWCE98, pp. 236–266.
  • A. Asenov, S. Babiker, S. P. Beaumont and J. R. Barker, "Monte Carlo calibrated drift-diffusion simulation of short channel HFETs," VLSI Design, Vol. 8, No. 1-4, pp. 319–323, 1998.
  • A. Asenov, A. R. Brown, S. Roy and J. R. Barker, "Topologically rectangular grids in the parallel simulation of semiconductor devices," VLSI Design, Vol. 6, No. 1-4, pp. 91–95, 1998.
  • A. Asenov, "Random dopant threshold voltage fluctuations in 50 nm epitaxial channel MOSFETs: A 3D 'atomistic' simulation study," in Proc. Proc. ESSDERC'98, pp. 300–303.
  • S. Babiker, A. Asenov, N. Cameron, S. P. Beaumont and J. R. Barker, "Complete Monte Carlo RF analysis of 'real' short channel compound FETs," IEEE Trans. Electron Dev. Vol. 45, No. 8, pp. 1644–1652, 1998.
  • S. Babiker, A. Asenov, S. Roy, J. R. Barker and S. P. Beaumont, "Strain engineered InxGa1-xAs channel pHEMTs on virtual substrates: A Simulation study," in Proc. Proceedings of the International Workshop on Computational Electronics IWCE98, pp. 178–181.
  • S. Babiker, A. Asenov, N. Cameron, S. P. Beaumont and J. R. Barker, "Complete RF analysis of compound FETs based on transient Monte Carlo simulation," VLSI Design, Vol. 8, No. 1-4, pp. 313–317, 1998.
  • S. Babiker, A. Asenov, J. R. Barker and S. P. Beaumont, "Quadrilateral finite element Monte Carlo simulation of complex shape compound FETs," VLSI Design, Vol. 6, No. 1-4, pp. 127–130, 1998.
  • Z. Borsosfoldi, D. R. Webster, I. G. Thayne, A. Asenov, D. G. Haigh and S. P. Beaumont, "Ultralinear pseudomorphic HEMTs for wireless comunications: A simulation study," in Proc. Institute of Physics Conference Series, pp. 475–478.
  • A. R. Brown, A. Asenov and J. R. Barker, "3D parallel finite element simulation of in-cell breakdown in lateral-channel IGBTs," VLSI Design, Vol. 8, No. 1-4, pp. 99–103, 1998.
  • A. Durndell, F. Uzunova, D. Asenova, A. Asenov and K. Thomson, "Gender neutral engineering: an impossible dream? - the case of Eastern Europe," Int. J. Sci. Education, Vol. 20, No. 7, pp. 783–793, 1998.
  • S. Roy, S. Kaya, S. Babiker, A. Asenov and J. R. Barker, "Monte Carlo investigation of optimal device architectures for SiGe FETs," in Proc. Proceedings of the International Workshop on Computational Electronics IWCE98, pp. 210–213.
  • S. Roy, A. Asenov, S. Babiker, J. R. Barker and S. P. Beaumont, "RF performance of Si/SiGe MODFETs: a simulation study," VLSI Design, Vol. 8, No. 1-4, pp. 325–330, 1998.
  • J. R. Watling, A. Asenov and J. R. Barker, "Efficient hole transport model in warped bands for use in the simulation of Si/SIGe MOSFETs," in Proc. Proceedings of IWCE 98, IEEE Cat. NO. 98EX116, pp. 96–99.

1997

  • A. Asenov, A. R. Brown, S. Roy, C. R. Arokianathan, J. H. Davies and J. R. Barker, "Parallel 3D Simulation of Semiconductor Devices," in Proc. 2nd NASA Device Modeling Workshop, Ames Research Center, Moffet Field, CA, USA, 1997, pp. 85–99.
  • S. Babiker, A. Asenov, N. Cameron and S. P. Beaumont, "The Ultimate Pseudomorphic HEMT on GaAs Substrate," in Proc. Proc. M & RF Conference, London, pp. 198–203.
  • J. R. Barker, S. Roy, S. Babiker and A. Asenov, "Circuit and architecture issues for single-electron devices," in Proc. Proceedings of the International Conference on Quantum Devices and Circuits, pp. 233–241.
  • S. Roy, A. Asenov, S. Babiker, J. R. Barker and S. P. Beaumont, "Monte Carlo analysis of Si/SiGe MODFET performance potential," Physica Status Solidi (b), Vol. 204, p. 525, 1997.
  • S. Roy, A. Asenov, S. Babiker, J. R. Barker and S. P. Beaumont, "RF performance of strained Si MODFETs and MOSFETs on ‘virtual’ SiGe substrates: A Monte Carlo study," in Proc. Proceedings of ESSDERC97, pp. 192–195.

1996

  • C. R. Arokianathan, A. Asenov and J. H. Davies, "An approach based on Brownian motion for the simulation of ultrasmall semiconductor devices," Journal of Applied Physics, Vol. 80, No. 1-4, pp. 1–7, 1996.
  • A. Asenov, S. Babiker, N. Cameron, S. Murad, M. C. Holland and S. P. Beaumont, "Devices Based on Low Dimensional Semiconductors," Kluwer Academic Publishers, 1996,
  • A. Asenov, "Modeling and Simulation in Education and Training," EUROSIM - Simulation News Europe, No. 6, p. 9, Mar. 1996.
  • A. Asenov, J. R. Barker, A. R. Brown and G. L. Lee, "Scalable parallel 3D finite element nonlinear Poisson solver," Journal of Simulation Practice and Theory, Vol. 45, pp. 155–168, 1996.
  • A. Asenov, A. R. Brown, S. Roy and J. R. Barker, "Topically Rectangular Finite Element Grids in the Parallel Simulation of Semiconductor Devices," in Proc. Computational Mechanics in UK, 4th ACME Annual Conference, Jan. 4-5, 1996, pp. 49–52.
  • A. Asenov, "Monte Carlo Simulation of Geometry and Surface Effects on the Performance of 0.1micron pHEMTs," in Proc. Proceedings of Advanced Heterojunction Workshop Kona, Hawaii (1996),
  • A. Asenov, S. Babiker, N. Cameron, M. R. S. Taylor and S. P. Beaumont, "Impact of Gate Recess Offset on Pseudomorphic HEMT performance: a Simulation Study," in Proc. Proceedings of ESSDERC 96, p. 1016.
  • S. Babiker, A. Asenov, N. Cameron and S. P. Beaumont, "Simple approach to include external resistances in the Monte Carlo simulation of MESFETs and HEMTs," IEEE Trans. Electron Dev. Vol. 43, No. 11, pp. 2032–2034, 1996.
  • S. Babiker, N. Cameron, A. Asenov and S. P. Beaumont, "New evidence for velocity overshoot in a 200nm pseudomorphic HEMT," Microelectronics Journal, Vol. 27, pp. 785–793, 1996.
  • S. Babiker, A. Asenov, J. R. Barker and S. P. Beaumont, "Finite element Monte Carlo simulation of recess gate compound FETs," IEEE Trans. Electron Dev. Vol. 39, No. 5, pp. 629–635, 1996.
  • N. Cameron, S. Murad, H. McLelland, A. Asenov, M. R. S. Taylor, M. C. Holland and S. P. Beaumont, "Gate Recess Engineering of Pseudomorphic In0.3GaAs/GaAs HEMTs," Electronics Letters, Vol. 32, No. 8, pp. 770–772, 1996.
  • S. Roy, A. Asenov, A. R. Brown and J. R. Barker, "Partitioning of Topologically Rectangular Finite Element Grids," in Proc. Proc. Computational Mechanics in UK, 4th ACME Annual Conference, pp. 41–44.
  • S. Roy, A. Asenov and J. R. Barker, "Optimum Partitioning of Topologically Rectangular Grids," in Proc. Proc. Int. Conf. HPSN Challenges in Telecomp and Telecom: Parallel Simulation of Complex Systems and Large-Scale applications (EUROSIM’96), pp. 179–185.

1995

  • A. Asenov, N. Cameron, M. R. S. Taylor, M. C. Holland and S. P. Beaumont, "Properties and Applications of Low Dimensional Semiconductors," Kluwer Academic Publishers, 1995, pp. 101–103.
  • A. Asenov and C. R. Stanley, "CAESAR: A virtual IC factory in an undergraduate semiconductor device fabrication laboratory," in Proc. IEE Colloquium on Physical Modeling of Semiconductor Devices, p. 10/1–10/6.
  • A. Asenov, D. Reid and J. R. Barker, "Speed-up of scalable iterative linear solvers implemented on an array of transputers," Parallel Computing, Vol. 21, No. 4, pp. 669–682, 1995.
  • A. Asenov and C. R. Stanley, "A virtual IC factory in an undergraduate semiconductor device fabrication laboratory," in Proc. Proceedings of EUROSIM Congress 95, pp. 1311–1316.
  • A. Asenov, S. Babiker, N. Cameron, S. P. Beaumont and J. R. Barker, "Design of properly scaled 100nm pseudomorphic HEMT using H2F," in Proc. IEE Colloquium on Physical Modeling of Semiconductor Devices, Digest No 1995/064, p. 7/1–7/6.
  • S. Babiker, N. Cameron, A. Asenov and S. P. Beaumont, "New evidence for velocity overshoot in a 200 nm Pseudomorphic HEMT," in Proc. Proceedings of ESSDERC95, pp. 173–176.
  • S. Babiker, A. Asenov, J. R. Barker and S. P. Beaumont, "Finite element Monte Carlo simulation of recess gate FETs," in Proc. Simulation of Semiconductor Devices and Processes, pp. 226–229.
  • A. R. Brown, A. Asenov, S. Roy and J. R. Barker, "Development of a parallel 3D finite element power semiconductor device simulator," in Proc. IEE Colloquium on Physical Modeling of Semiconductor Devices, Digest No. 1995/064, 1995, p. 2/1–2/6.
  • A. R. Brown, A. Asenov, S. Roy and J. R. Barker, "Parallel 3D finite element power semiconductor device simulator based on topologically rectangular grid," in Proc. Simulation of Semiconductor Devices and Processes, 2005, pp. 336–339.
  • I. Nachev and A. Asenov, "Subband energy states in a single quantum barrier heterostructure computed by path integrals," PHANTOMS Newsletter, No. 10, pp. 9–11, 1995.
  • P. Speckbacher, J. Berger, A. Asenov, F. Koch and W. Weber, "The 'gated diode' configuration in MOSFETs, a sensitive tool for characterising hot carrier degradation," IEEE Trans. Electron Dev. Vol. 42, No. 7, pp. 1287–1297, 1995.

1994

  • A. Asenov, N. Cameron, M. R. S. Taylor, S. P. Beaumont and J. R. Barker, "Numerical simulation of the series resistances in deep - submicrometer recess gate MESFETs," in Proc. Proc. of the European Gallium Arsenide and Related III-V Compounds Application Symposium, Torino, pp. 373–376.
  • A. Asenov, J. R. Barker, A. R. Brown and G. L. Lee, "Scalable parallel 3D finite element nonlinear Poisson solver," in Proc. Massively Parallel Processing, Applications and Development, pp. 665–672.
  • A. Asenov, J. R. Barker and A. R. Brown, "Parallel 3D finite element simulation of nano-structured devices," in Proc. NASECODE X, pp. 52–53.
  • J. R. Barker, A. Asenov, A. R. Brown, J. Cluckie, S. Babiker and C. R. Arokianathan, "Parallel simulation of semiconductor devices," in Proc. Massively Parallel Processing, Applications and Development, pp. 683–690.
  • A. R. Brown, A. Asenov, J. R. Barker, P. Waind and D. E. Crees, "Calibration of the numerical simulations in the design of high temperature IGBTs," in Proc. 2nd International Seminar on Power Semiconductors (ISPS), Prague, Czech Republic, Aug. 31-Sept. 2, 1994, pp. 151–157.
  • N. Cameron, A. Asenov, S. M. Ferguson, M. R. S. Taylor, M. C. Holland and S. P. Beaumont, "Reduced short channel effects in selectively dry gate recessed p-doped buffered pseudomorphic HEMTs," in Proc. Proc. of the European Gallium Arsenide and Related III-V Compounds Application Symposium, Torino, pp. 111–114.
  • I. Nachev, A. Asenov and N. Velchev, "Theory of Configurational interaction in semiconductor space-charge layer," Preprint, Int. Centre for Theoretical Physics, Miramare-Trieste, 1994.

1993

  • A. Asenov, D. Reid, J. R. Barker, N. Cameron and S. P. Beaumont, "Parallel Simulation of Semiconductor Devices on MIMD Machines," in Proc. Proc. International Workshop on Computational Electronics, pp. 50–55.
  • A. Asenov, D. Reid, J. R. Barker, N. Cameron and S. P. Beaumont, "Finite element simulation of recess gate MESFETs and HEMTs. The Simulator H2F," in Proc. Simulation of Semiconductor Processes and Devices, pp. 265–268.
  • A. Asenov, D. Reid and J. R. Barker, "The implementation and speed-up of coloured SOR methods solving 3D problems on array transputers," in Proc. Transputer Applications and Systems, pp. 578–587.
  • S. Babiker, J. R. Barker and A. Asenov, "Queuing-theoretic simulation of single-electronic metal-semiconductor devices and systems," in Proc. Proceedings of the International Workshop on Computational Electronics IWCE93, pp. 260–264.
  • A. R. Brown, A. Asenov, J. R. Barker, S. Jones and P. Waind, "Numerical simulation of IGBTs at elevated temperatures," in Proc. 2nd International Workshop on Computational Electronics (IWCE), Leeds, UK, Aug. 11-13, 1993, pp. 50–55.
  • A. R. Brown, D. Reid, A. Asenov and J. R. Barker, "The implementation and speed-up of coloured SOR methods for solving 3D Poisson equation on an array of transputers," in Proc. 2nd International Workshop on Computational Electronics (IWCE), Aug. 11-13, 1993, pp. 173–176.
  • S. Roy, J. R. Barker and A. Asenov, "System simulation tools for single-electronic devices," in Proc. Proceedings of the International Workshop on Computational Electronics IWCE93, pp. 275–279.

1992

  • A. Asenov and M. E. Raikh, "Coulomb Blockade of Hopping Transport Through a Disordered Barrier," in Proc. Proceedings of CMMP 92, p. 234.
  • A. Asenov and D. Reid, "Theoretical Study of the Effect of HEMT Gate Recess on MESFET and HEMT Characteristics," in Proc. Proceedings of CMMP 92, p. 128.
  • P. Chistman, C. Wetzel, B. K. Meyer, A. Asenov and A. Endros, "Spin dependent recombination in Pt doped silicon p-n junction," Applied Physics Letters, Vol. 60, pp. 1857–1859, 1992.
  • J. Marczewski, M. Zachau, A. Asenov and F. Koch, "A Diode Device Combining Lateral Field-Effect Transport and Vertical Tunneling in a Multi Quantum-Well Heterostructure," IEEE Electron. Dev. Lett. Vol. 13, pp. 338–340, 1992.
  • M. E. Raikh and A. Asenov, "Coulomb Blockade of Inelastic Transport Through a Disordered Barrier," Acta Physica Polonica A, Vol. 37, p. 765, 1992.
  • M. E. Raikh and A. Asenov, "Inelastic Transport through a disordered barrier. The effect of the Coulomb Blockade," Superlattices and Microstructures, Vol. 11, pp. 325–327, 1992.
  • E. Stefanov, F. Koch, A. Asenov, U. Meiners and H. Brugger, "The In-Plane Gate Transistor: Device Simulation, Design and Test of the IPG," in Proc. Extended Abstracts of the 1992 Int. Conf. on Solid State Devices and Materials, pp. 759–761.