Case Study: 35nm Device


35nm Device

Extraction

Using standard TCAD process simulation tools, the structure for a 35nm MOSFET was developed. This structure, based on published data by Toshiba, was then extracted and entered into the GARAND simulation tool.

35nm Device
35nm Device

Callibration

The GARAND simulation tool is carefully callibrated to match both experimental data and simulation data for the developed 35nm MOSFET.

35nm Device
35nm Device

Simulation

Once callibrated the GARAND simulation tool is used to create statistical ensembles of devices including various sources of variability such as random dopants, line edge roughness, oxide thickness variation, Poly-Si granularty and High-k granularity.

35nm Device
35nm Device

Results

For each statistical ensemble it is possible to calculate threshold voltage variability, off/on current variability or the full I-V characteristic of each device in the ensemble.

35nm Device
35nm Device

Circuit Simulation

With an appropriate SPICE model the I-V data generated by the GARAND simulation tool can be used to carry out SPICE simulation of standard cells such as an SRAM cell.