Summary

SCNAP5 used in conjunction with CADENCE Verilog VMX provides a powerful mixed-mode simulator operating in the time domain. It will provide detailed analysis of the effects of linear non-idealities in the analogue components.

SCNAP5 currently features:

Enhanced Time Domain Simulator

Used for detailed simulation of delta-sigma converters, pipelined flash convertors and other mixed-mode systems.

Hardware Platform Operating system release
Sun SunOS 4.1.3

SCNAP5 can be supplied on floppy disk and comes complete with a suite of examples and a User Guide. The user will need to have FFT routines and a graphics display package available. Additionally, users will require the relevant Cadence licence to interface SCNAP5 with Verilog. Please note that the software is not supported by a maintenance contract.
Contact sewell@elec.gla.ac.uk for further information.

The software is available under licence from the University - contact James Paris
at jparis@mis.gla.ac.uk for licensing details.


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Analogue VLSI Group - Department of Electronics and Electrical Engineering,
© University of Glasgow 1998