Welcome to the web-site for Analogue VLSI Research!

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Current research activities are primarily concerned with the development of highly efficient CAD tools for use in the synthesis and simulation of analogue and mixed-mode VLSI systems. This includes software for filter and equaliser synthesis - passive RLC, active RC, switched-capacitor (SC), switched-current (SI),transconductance-C and log-domain together with multirate filter design in SC and SI realisations. Software for the design and optimisation of high order sigma-delta coverters is also being developed.

Work on simulation tools for switched-networks and mixed-mode systems has produced very versatile and efficient software suitable for analysis of large systems containing many nodes and utilising numerous clock waveforms. The research continues on the simulation of mixed-mode systems with non-periodic clocks and high-frequency front-end systems.

Professor J.I. Sewell - Research Director.
M.A. Teplechuk - Research Student.
S.Soell - Research Student.
David Loomes - Research Assistant.

The following projects are currently active:

Advanced mixed-mode simulation.
Synthesis of high order sigma-delta converters.
Synthesis of complex (polyphase) filters.
Synthesis of log-domain filters.
Synthesis of high frequency IC filters.
Highly selective IC filter systems.

There are opportunities for suitably qualified graduate students to undertake research activities towards PhD's in these and related areas. See Postgraduate Information for further details.

XFILT software - for filter and equaliser design.
SCNAP4 software - for switched network analysis.
SCNAP5 software - for mixed-mode simulation.
SCNAPDIS software - for switched network distortion analysis.

Analog Design Software the University Library archive

Li Ping, R.K.Henderson and J.I.Sewell, "A methodology for integrated ladder filter design", I.E.E.E.Trans. CAS, August 1991, CAS-38, No.8, pp.853-868.
Z.Q.Shang and J.I.Sewell, "Development of efficient switched network and mixed-mode simulators", Proc. I.E.E., Circuits, Devices and Systems, February 1998, Vol.145, No.1, pp.24-34.
D.H.Hossack and J.I.Sewell, "A robust CMOS compander", I.E.E.E. Journal of Solid State Circuits, July 1998, Vol.33, No.7, pp.1059-1064.
A.E.J.Ng and J.I.Sewell, "N-path and pseudo-N-path cells for switched-current signal processing", I.E.E.E.,Trans. CAS-II, September 1999, Vol.46, No.9, pp.1148-1160 .
A.E.J.Ng and J.I.Sewell, "Direct noise analysis of log-domain filters", I.E.E.E.,Trans. CAS-II, February 2002, Vol.49, No.2, pp.101-109.
A.E.J.Ng, M.A.Teplechuk and J.I.Sewell, "Unified matrix method for systematic synthesis of log-domain ladder filters", Proc. I.E.E., Circuits Devices and Systems, August 2004, Vol.151, No.4, pp.545-548.

Imperial College London - Electrical and Electronic Engineering.
University College London - Electronics and Electrical Engineering.
University of Toronto - Electronics and Computer Engineering.
Cadence Design Systems, UK.
Philips Research Laboratories Redhill, Surrey.
Philips Semiconductors Ltd., Southampton.
Wolfson Microelectronics Ltd., Edinburgh.
Europractice Training

Professor J.I.Sewell
Department of Electronics and Electrical Engineering
University of Glasgow
Glasgow,Scotland
G12 8LT.

Tel: +44 (0)141 330 4253
Fax: +44 (0)141 330 4907
Email: sewell@elec.gla.ac.uk

Comments on these pages to: vlsiweb@elec.gla.ac.uk
Last updated - October 2004.